H10W70/041

Method of coupling semiconductor dice and corresponding semiconductor device

An encapsulation of laser direct structuring (LDS) material is molded onto a substrate having first and second semiconductor dice arranged thereon. Laser beam energy is applied to a surface of the encapsulation of LDS material to structure therein die vias extending through the LDS material to the first and second semiconductor dice and a die-to-die line extending at surface of the LDS material between die vias. Laser-induced forward transfer (LIFT) processing is applied to transfer electrically conductive material to the die vias and the die-to-die line extending between die vias. A layer of electrically conductive material electroless grown onto the die vias and the die-to-die line facilitates improved adhesion of the electrically conductive material transferred via LIFT processing.

Semiconductor device and method of manufacturing the same

Reliability of a semiconductor device is improved. The semiconductor device includes a clip which is electrically connected to a main-transistor source pad via a first silver paste and is connected to a lead via a second silver paste. The clip has a first part with which the first silver paste is in contact, a second part with which the second silver paste is in contact, and a third part positioned between the first part and the second part. A protruding member is formed on a surface of the main-transistor source pad, and the first part is in contact with the protruding member.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
20260018495 · 2026-01-15 ·

A semiconductor device comprising a terminal, a semiconductor element and a sealing resin. The semiconductor element is disposed on one side of the terminal in a first direction and electrically connected to the terminal. The sealing resin covers the semiconductor element and a part of the terminal. The sealing resin has a bottom surface disposed on an opposite side to the semiconductor element with respect to the terminal in the first direction. The terminal extends beyond the bottom surface.

Semiconductor device package with vertically stacked passive component

In a described example, an apparatus includes: a package substrate with conductive leads; a semiconductor die mounted to the package substrate, the semiconductor die having a first thickness; electrical connections coupling bond pads on the semiconductor die to conductive leads on the package substrate; brackets attached to the package substrate spaced from the semiconductor die and extending away from the package substrate to a distance from the package substrate that is greater than the first thickness of the semiconductor die; and mold compound covering the package substrate, the semiconductor die, the brackets, and the semiconductor die to form a semiconductor device package having a board side surface and a top surface opposite the board side surface, and having portions of the brackets exposed from the mold compound on the top surface of the semiconductor device package to form mounts for a passive component.

ELECTRONIC PACKAGE WITH SURFACE CONTACT WIRE EXTENSIONS
20260026385 · 2026-01-22 ·

An electronic package includes an electronic component including terminals, a plurality of surface contacts, at least some of the surface contacts being electrically coupled to the terminals within the electronic package, a mold compound covering the electronic component and partially covering the surface contacts with a bottom surface exposed from the mold compound, and a plurality of wires extending from exposed surfaces of the surface contacts, each of the wires providing a solderable surface for mounting the electronic package at a standoff on an external board.

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
20260026367 · 2026-01-22 ·

A semiconductor package including a first lead comprising a first surface and a second surface that is opposite to the first surface, at least one semiconductor chip that is placed on the first surface of the first lead, a connecting structure body that is connected to the first lead, and a molding layer configured to cover the first lead and the semiconductor chip. The first lead comprises a recess that is formed on the second surface of the lead, and the connecting structure body is placed in the recess. The semiconductor chip, the first lead, and the connecting structure body are electrically connected to each other.

Molded package having an electrically conductive clip with a convex curved surface attached to a semiconductor die

A molded package includes: a semiconductor die; a substrate attached to a bottom side of the semiconductor die; an electrically conductive clip attached to a top side of the semiconductor die; and a mold compound encapsulating the semiconductor die. A top side of the electrically conductive clip faces away from the semiconductor die and has an exposed flat surface that overlays the semiconductor die and is not covered by the mold compound. A bottom side of the electrically conductive clip faces the semiconductor die and has a convex curved surface that is attached to the top side of the semiconductor die. Along a vertical cross-section of the electrically conductive clip from the exposed flat surface to the convex curved surface, the electrically conductive clip has a plano-convex shape delimited by the exposed flat surface and the convex curved surface. A method of producing the molded package is also described.

SEMICONDUCTOR ARRANGEMENT, SYSTEM AND MANUFACTURING METHOD
20260033350 · 2026-01-29 ·

A semiconductor arrangement includes first and second semiconductor packages separate from one another. Each semiconductor package includes a die carrier having opposite first and second main faces, a transistor die disposed on the first main face, a first lead connected to a first load electrode of the transistor die, a second lead connected to a gate electrode of the transistor die, and an encapsulant embedding at least part of the first main face of the die carrier, inner portions of the leads and the transistor die. The first lead of the first semiconductor package is electrically connected to the first lead of the second semiconductor package, forming a source-source connection. The second lead of the first semiconductor package and the second lead of the second semiconductor package are arranged between the first semiconductor package and the second semiconductor package.

LEADFRAME WITH VARYING THICKNESSES AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGES
20260060089 · 2026-02-26 · ·

The present disclosure is directed to semiconductor packages manufactured utilizing a leadframe with varying thicknesses. The leadframe with varying thicknesses has a reduced likelihood of deformation while being handled during the manufacturing of the semiconductor packages as well as when being handled during a shipping process. The method of manufacturing is not required to utilize a leadframe tape based on the leadframe with varying thicknesses. This reduces the overall manufacturing costs of the semiconductor packages due to the reduced materials and steps in manufacturing the semiconductor packages as compared to a method that utilizes a leadframe tape to support a leadframe. The semiconductor packages may include leads of varying thicknesses formed by utilizing the leadframe of varying thicknesses to manufacture the semiconductor packages.

ELECTRONIC DEVICE HAVING AN IMPROVED MOLD-FLOW DESIGN
20260060131 · 2026-02-26 ·

An electronic device includes a leadframe where the leadframe includes a first set of leads, a second set of leads, and conductive pads. A heat sink is attached to the conductive pads. The heat sink includes a pair of heat sink pads separated by a gap, and a die attach pad. The die attach pad has a semi-circular shape and is connected to an end of each of the pair of heat sink pads to form a U-shape. The die attach pad further includes an airgap prevention feature. A die is attached to the heat sink and wire bonds connect the die to the leadframe. A mold compound encapsulates the heat sink, the die, and the wire bonds.