H10W72/07338

Thermally conductive material for electronic devices

An electrically non-conducting film (109) comprising an oligomer comprising an arylene or heteroarylene repeating unit is disposed between a chip (105), e.g. a flip-chip, and a functional layer (101), e.g. a printed circuit board, electrically connected to the chip by electrically conducting interconnects (107). The oligomer may be crosslinked.

Semiconductor device and semiconductor device manufacturing method
12543591 · 2026-02-03 · ·

According to one embodiment, a semiconductor device includes: a circuit board; a first semiconductor chip mounted on a face of the circuit board; a resin film covering the first semiconductor chip; and a second semiconductor chip having a chip area larger than a chip area of the first semiconductor chip, the second semiconductor chip being stuck to an upper face of the resin film and mounted on the circuit board. The resin film entirely fits within an inner region of a bottom face of the second semiconductor chip when viewed in a stacking direction of the first and second semiconductor chips.

DIE FLIP BONDING DEVICE AND SEMICONDUCTOR PACKAGE MANUFACTURING METHOD

A die flip bonding device includes a substrate holder configured to provide a substrate including a plurality of die stacks having a gap in a first direction, the plurality of die stacks being wire-bonded; a first moving body configured to move to a first position to pick up a first uppermost die of a first die stack, among the plurality of die stacks, and then half-flip the first uppermost die in the first direction to move the first uppermost die to a second position; and a second moving body configured to move to the second position to receive the first uppermost die of the first die stack from the first moving body, and after the movement of the first moving body, half-flip the first uppermost die of the first die stack in the first direction at the second position to move the first uppermost die to a third position.

IC chip mounting device, and IC chip mounting method
12588532 · 2026-03-24 · ·

The present invention is an IC chip mounting apparatus including: a conveyor configured to convey an antenna continuous body on a conveying surface, the antenna continuous body having a base material and plural inlay antennas continuously formed on the base material; an ejection unit configured to eject a thermosetting adhesive toward a reference position of each antenna in the antenna continuous body; an IC chip placement unit configured to place an IC chip on the adhesive that is located on the reference position of each antenna in the antenna continuous body; a first light irradiator configured to irradiate the adhesive of each antenna with a first light, in the vicinity of a position where an IC chip is located on the conveying surface; and a second light irradiator configured to irradiate the adhesive of each antenna with a second light, at a position downstream from a position where the adhesive is irradiated with the first light.

SEMICONDUCTOR PACKAGE SUBSTRATE WITH A SMOOTH GROOVE STRADDLING TOPSIDE AND SIDEWALL
20260090401 · 2026-03-26 ·

A semiconductor package includes a metallic substrate, the metallic substrate including a roughened surface, a semiconductor die including bond pads, and an adhesive between the roughened surface of a topside of the metallic substrate and the semiconductor die, therein bonding the semiconductor die to the metallic substrate. The adhesive includes a resin. The metallic substrate further includes a groove about a perimeter of the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic substrate. The groove straddles the topside and a sidewall of the metallic substrate.

CHIP PACKAGING STRUCTURE AND PREPARATION METHOD

A chip packaging structure includes, a chip on a substrate; an enclosure structure on the chip, a wall of the enclosure structure comprises a sealed cavity, and the chip is revealed through the sealed cavity; a layer of thermal interface material for the chip, formed by filling a liquid metal into the sealed cavity of the wall of the enclosure structure; and a heat sink, formed on the layer of thermal interface material, is hermetically sealed to the wall of the enclosure structure. The heat sink component is formed on the layer of the thermal interface material, sealed and connected to the enclosure structure. The enclosure structure using flexible materials to prevent the liquid metal from overflowing in the encapsulation and application process, thereby reducing degradation. The UV curing adhesive is used for sealing and fixing the connection to the thermal interface material layer, so the disassembly and replacement of the process is simpler.

Non-electroconductive flux, connected structure, and method for producing connected structure

Provided is a non-electroconductive flux capable of enhancing productivity and impact resistance of a connected structure to be obtained and suppressing occurrence of solder flash. The non-electroconductive flux according to the present invention contains an epoxy compound, an acid anhydride curing agent, and an organophosphorus compound.

SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE MANUFACTURING METHOD, AND SEMICONDUCTOR PACKAGE MANUFACTURING DEVICE
20260101756 · 2026-04-09 ·

A semiconductor package includes a substrate including a first layer, a plurality of structures extending in a first direction on the first layer by a first length and including the same materials as the first layer, and a first semiconductor chip bonded to the substrate, wherein a separation distance in the first direction between a first surface of the first semiconductor chip facing the substrate and the substrate is determined by the first length.

Method of manufacturing semiconductor device

To manufacture a semiconductor device, a first heat treatment for curing a first adhesive material of a conductive paste type is performed, after a semiconductor chip is mounted on a die pad of a lead frame via the first adhesive material. After that, a metal plate is disposed on a pad of the semiconductor chip such that the metal plate faces the pad of the semiconductor chip via a second adhesive material of a conductive paste type, and a second heat treatment is performed for curing each of the first adhesive material and the second adhesive material. A time of the first heat treatment is less than a time of the second heat treatment. After the first adhesive material is cured by the first heat treatment, the first adhesive material is further cured by the second heat treatment.

Thermosetting resin composition, semiconductor device and electrical/electronic component

There are provided a thermosetting resin composition for semiconductor bonding and a thermosetting resin composition for light emitting device which have high thermal conductivity and an excellent heat dissipation property and are capable of reliable pressure-free bonding of a semiconductor element and a light emitting element to a substrate. A thermosetting resin composition comprising: (A) silver fine particles ranging from 1 nm to 200 nm in thickness or in minor axis; (B) a silver powder having an average particle size of more than 0.2 m and 30 m or less; (C) resin particles; and (D) a thermosetting resin, wherein an amount of the resin particles (C) is 0.01 to 1 part by mass and an amount of the thermosetting resin (D) is 1 to 20 parts by mass, to 100 parts by mass being a total amount of the silver fine particles (A) and the silver powder (B).