Provided are a protective film forming agent for a silicon-based substrate, the protective film forming agent containing a silylating agent and a solvent having a Hildebrand SP value of 17.5 or less, a method for processing a silicon-based substrate using the same, and a method for manufacturing a semiconductor device using the same.

A resist underlayer film forming composition exhibits excellent filling properties and planarization properties with respect to a substrate with level difference, while having high storage stability of a polymer that serves as a main component of a resist underlayer film; a resist pattern forming method uses this resist underlayer film forming composition; and a method for producing a semiconductor device using this resist underlayer film forming composition. A resist underlayer film forming composition contains (a) a thermal acid generator that is represented by formula (1), (b) a polymer that contains an aromatic ring, (c) a base B.sup.2 and (d) a solvent. In formula (1), A.sup.1 represents an optionally substituted linear, branched or cyclic, saturated or unsaturated aliphatic hydrocarbon group, or an optionally substituted aromatic ring residue. In formula (1), B.sup.1 represents a counter base; and at least one base among B.sup.1 and B.sup.2 has a higher pKa than pyridine.

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The present disclosure relates to plasma dicing of wafer. More specifically, the present disclosure is directed to frame masks and methods for plasma dicing wafers utilizing frame masks. The frame mask includes a mask frame, wherein the mask frame includes a top ring mask support and a side ring mask support. A plurality of mask segments suspended from the top ring mask support by segment supports, the mask segments are configured to define dicing channels on a blank wafer. The frame mask is configured to removably sit onto a frame lift assembly in a plasma chamber of a plasma dicing tool, when fitted onto the frame lift assembly, the mask segments are disposed above a wafer on a wafer ring frame for plasma dicing. The mask frame is configured to enable flow of plasma therethrough to the wafer to etch the wafer to form dicing channels defined by the mask segments.