The present invention relates to a metal interconnect structure containing no barrier metal and a method of manufacturing the metal interconnect structure. The method includes: filling at least a first interconnect trench with an intermetallic compound by depositing the intermetallic compound on an insulating layer having the first interconnect trench and a second interconnect trench formed in the insulating layer, the second interconnect trench being wider than the first interconnect trench; performing a planarization process of polishing the intermetallic compound until the insulating layer is exposed; and then performing a height adjustment process of polishing the intermetallic compound and the insulating layer until a height of the intermetallic compound in the first interconnect trench reaches a predetermined height.

Technologies for through-glass vias with caps are disclosed. In an illustrative embodiment, a substrate core has holes defined in it, and vias are positioned in the holes to carry power or data signals through the substrate core. The vias are formed using bottom-up plating, forming vias that are not anchored to the sidewalls of the holes in the substrate core. The vias can thus move relative to the substrate core, which can mitigate cracking of the core during thermal cycling. In order to mitigate cracking in the build-up layers on the core, the via has a via cap, which can reduce the stress in the build-up layers. Various configurations of such vias are disclosed, and various approaches to fabricate such vias are disclosed.

A package structure is provided. The package structure includes a first interconnect structure over a first substrate. The package structure also includes a second interconnect structure below a second substrate. The package structure further includes a bonding structure between the first interconnect structure and the second interconnect structure. The bonding structure comprises a first intermetallic compound (IMC) and a second intermetallic compound (IMC). In addition, the package structure includes a first seed layer below the bonding structure. The package structure also includes a second seed layer over the second IMC. Opposite sidewalls of the second seed layer are covered by the second IMC.

A device structure may be manufactured by forming metal interconnect structures embedded in dielectric material layers over a substrate; forming active metal connection structures, primary dummy metal structures, and miniature dummy metal structures over a topmost dielectric material layer selected from the dielectric material layers, wherein the miniature dummy metal structures have a lesser height than the active metal connection structures and the primary dummy metal structures; and forming bonding pads over the active metal connection structures, the primary dummy metal structures, and the miniature dummy metal structures, wherein the active metal connection structures and the primary dummy metal structures are contacted by the bonding pads, and the miniature dummy metal structures are not contacted by any of the bonding pads.