H10W70/461

Semiconductor Package Having a Die Assembly with an Electrically Insulating Thickness-Matching Layer
20260018513 · 2026-01-15 ·

A semiconductor package includes a laminate package body and a die assembly embedded within the laminate package body. The laminate package body includes a plurality of laminate dielectric layers stacked on top of one another and metallization layers interposed between the laminate dielectric layers. The die assembly includes a thermally conductive substrate that includes a planar upper surface, a semiconductor die mounted on the planar upper surface of the thermally conductive substrate, and an electrically insulating thickness-matching layer formed on the planar upper surface of the thermally conductive substrate and surrounding the semiconductor die. An upper surface of the electrically insulating thickness-matching layer is substantially coplanar with an upper surface of the semiconductor die. The upper surface of the electrically insulating thickness-matching layer and the upper surface of the semiconductor die form an upper surface of the die assembly.

MULTI-PHASE SILICON CARBIDE PACKAGING STRUCTURE
20260018497 · 2026-01-15 ·

A packaging structure includes heat dissipation substrate, a lead frame, multiple half-bridge modules, and a package body. The heat dissipation substrate has a metal routing. The lead frame is coupled to the heat dissipation substrate and includes a power pin and a ground pin. Half-bridge modules connect in parallel between the power pin and the ground pin. Each half-bridge module includes a high-side SiC transistor, a low-side SiC transistor and a first clip. The high-side SiC transistor and the low-side and the SiC transistor are flip-chip mounted on the corresponding position of the metal routing of the heat dissipation substrate. The source electrode of the high-side SiC transistor is coupled to the drain electrode of the low-side SiC transistor through the first connecting piece and the metal routing. The package covers the heat dissipation substrate, multiple sets of half-bridge modules and part of the lead frame.

Package substrate based on molding process and manufacturing method thereof

A package substrate based on a molding process may include an encapsulation layer, a support frame located in the encapsulation layer, a base, a device located on an upper surface of the base, a copper boss located on a lower surface of the base, a conductive copper pillar layer penetrating the encapsulation layer in the height direction, and a first circuit layer and a second circuit layer over and under the encapsulation layer. The second circuit layer includes a second conductive circuit and a heat dissipation circuit, the first circuit layer and the second conductive circuit are connected conductively through the conductive copper pillar layer, the heat dissipation circuit is connected to one side of the device through the copper boss and the base, and the first circuit layer is connected to the other side of the device.

Packages with multiple exposed pads

In an example, an apparatus comprises a lead frame that includes a first row of leads, a first pad coupled to the first row of leads, and a second row of leads parallel to the first row of leads. The lead frame also includes a second pad coupled to the second row of leads. The first and second pads are separated by a gap, and each of the first and second pads has a substantially uniform thickness. The apparatus also includes a device coupled to the first and second pads. The first and second pads are exposed to an exterior of the apparatus.

Clip for a discrete power semiconductor package

A discrete power semiconductor package includes a semiconductor chip, a heatsink, a first lead, a second lead, and a clip. The heatsink is adjacent the semiconductor chip and draws heat away from the semiconductor chip. The clip binds the semiconductor chip to the heatsink and includes a chip linker, a first terminal, and a second terminal. The chip linker is atop the semiconductor chip. The first terminal connects to the first lead and the second terminal connects to the second lead.

Semiconductor device and method of manufacturing semiconductor device
12532751 · 2026-01-20 · ·

An object is to provide a technique that improves the moisture uptake resistance of a semiconductor device. A semiconductor device includes a resin insulating sheet, a heat spreader provided on the resin insulating sheet, a semiconductor element mounted on the heat spreader, a lead frame having one end portion thereof connected to the semiconductor element, a first resin body that seals the resin insulating sheet, the heat spreader, the semiconductor element, and the one end portion of the lead frame with a rear surface of the resin insulating sheet being exposed, and a second resin body that seals the first resin body with the rear surface of the resin insulating sheet being exposed.

LOADING FRAME FOR HIGH I/O COUNT PACKAGED SEMICONDUCTOR CHIP

An apparatus is described. The apparatus includes a loading frame for mounting a packaged semiconductor chip and a heat sink for the packaged semiconductor chip to a socket. The loading frame is comprised of metal. The loading frame has at least one frame leg where the metal is folded to re-enforce a strength of the frame leg.

Control chip for leadframe package
12564073 · 2026-02-24 · ·

An electronic device includes: an insulating substrate including an obverse surface facing a thickness direction; a wiring portion formed on the substrate obverse surface and made of a conductive material; a lead frame arranged on the substrate obverse surface; a first and a second semiconductor elements electrically connected to the lead frame; and a first control unit electrically connected to the wiring portion to operate the first semiconductor element as a first upper arm and operate the second semiconductor element as a first lower arm. The lead frame includes a first pad portion to which the first semiconductor element is joined and a second pad portion to which the second semiconductor element is joined. The first and second pad portions are spaced apart from the wiring portion and arranged in a first direction with a first separation region sandwiched therebetween, where the first direction is orthogonal to the thickness direction. The first control unit is spaced apart from the lead frame as viewed in the thickness direction, while overlapping with the first separation region as viewed in a second direction orthogonal to the thickness direction and the first direction.

Semiconductor device

A semiconductor device includes a power semiconductor element, and a molding resin sealing the power semiconductor element. In plan view, the molding resin has a rectangular shape consisting of a first side and a second side extending along a first direction, and a third side and a fourth side extending along a second direction orthogonal to the first direction. The first side is longer than the third side. The molding resin is provided with a first threaded bore and a second threaded bore, the first threaded bore and the second threaded bore penetrating the molding resin along a third direction orthogonal to the first direction and the second direction.

Power semiconductor module and method of producing a power semiconductor module

A power semiconductor module includes an AC bus bar having a first side that faces a first substrate and a second side that faces a second substrate. A first power transistor die has a drain terminal connected to a first metallic region of the first substrate and a source terminal connected to the first side of the AC bus bar. A second power transistor die has a drain terminal connected to the second side of the AC bus bar and a source terminal connected to a first metallic region of the second substrate. First and second DC bus bars are connected to the first metallic region of the respective substrates, vertically overlap one another, and protrude from a first side of a mold body that encapsulates the power transistor dies. The AC bus bar protrudes from a different side of the mold body as the DC bus bars.