Implementations described herein relate to various semiconductor device assemblies. In some implementations, a semiconductor device assembly includes: a substrate; a stack of one or more semiconductor dies, the one or more semiconductor dies including a first semiconductor die directly bonded to a second semiconductor die; and one or more conductive pillars that electrically couple respective semiconductor dies of the one or more semiconductor dies with the substrate.

A method of manufacturing an electronic device includes the following steps: providing an assembly comprising a substrate having a first die formed therein and having conductive areas positioned on a top surface thereof, a second die being mounted on the substrate and connected to the first die, the second die comprising through silicon vias; forming conductive pillars on the connection areas, an upper surface of the conductive pillars being flush with the second surface of the second die; forming a passivation layer on the substrate and on the second die; and forming conductive elements on the conductive pillars and on the vias, the periphery of the conductive elements covering the passivation layer.

A semiconductor device capable of suppressing a bonding defect between a bump of a semiconductor chip and a land of a wiring substrate is provided. The semiconductor device includes the semiconductor chip. The semiconductor chip includes a semiconductor substrate, a wiring layer, a protective film, a first bump and a second bump. The wiring layer is formed on the semiconductor substrate and has a first bonding pad and a second bonding pad. The first bonding pad has a first upper surface. The second bonding pad has a second upper surface. The protective film is formed on the wiring layer so as to cover the first bonding pad and the second bonding pad. The protective film has a first opening portion overlapping the first bonding pad and penetrating through the protective film, and a second opening portion overlapping the second bonding pad and penetrating through the protective film.

An electronic device according to the present disclosure includes a semiconductor substrate, a chip, and a bump. The chip has a thermal expansion coefficient different from that of the semiconductor substrate. The bump connects the connection pads provided on the opposing principal surfaces of the semiconductor substrate and the chip. The bump has a porous metal layer and a metal film. The metal film is provided on at least one of a portion between the connection pad provided on the semiconductor substrate and the porous metal layer and a portion between the connection pad provided on the chip and the porous metal layer, and on the side surfaces of the porous metal layer.

A bonding structure of a semiconductor package device that physically and electrically connects between a semiconductor chip and a package substrate or between a package substrate and a board, the bonding structure includes a solder; a main pad that faces the solder; and an electrically conductive support structure that is connected between the solder and the main pad, the electrically conductive support structure including a sub pad bonded to the solder, the sub pad being spaced apart from the main pad and facing the main pad, and at least one leg extending from the sub pad to the main pad.