A substrate bonding device including: a bonding chamber including (i) a loading region in which a lower substrate is loaded, (ii) a bonding region in which an upper substrate is bonded to the lower substrate, and (iii) an unloading region spaced from the loading region and unloading the lower substrate to which the upper substrate is bonded in an internal space; a plurality lower chucks configured to support the lower substrate, each lower chuck moveable to be sequentially disposed in the loading region, the bonding region, and the unloading region; and an upper chuck configured to support the upper substrate to face the lower substrate in the bonding region.

Provided is a substrate bonding device in which a risk of substrate damage due to vibration is alleviated, the substrate bonding device including a first chuck configured to support a lower substrate, a second chuck configured to grip an upper substrate facing the lower substrate in a first direction perpendicular to an upper surface of the lower substrate, and a press disposed at a center of the second chuck and configured to push the upper substrate toward the lower substrate in the first direction, and the press includes a first pressurizing part and a second pressurizing part which are spaced apart from each other in the first direction.

Method and systems for bonding and/or debonding substrates are disclosed. A method comprises positioning a first surface of a first substrate directly opposite to and at a distance from a surface of a second substrate. The method further comprises applying a first pressure over a first portion of a second surface of the first substrate via pressurized gas to contact a first portion of the first surface of the first substrate to a first portion of the first surface of the second substrate, and applying a second pressure via pressurized gas in a direction opposite a propagation direction of a bonding wave front between the first substrate and the second substrate to control the bonding wave front.

In an embodiment, a device includes: a first integrated circuit die comprising a semiconductor substrate and a first through-substrate via; a gap-fill dielectric around the first integrated circuit die, a surface of the gap-fill dielectric being substantially coplanar with an inactive surface of the semiconductor substrate and with a surface of the first through-substrate via; a dielectric layer on the surface of the gap-fill dielectric and the inactive surface of the semiconductor substrate; a first bond pad extending through the dielectric layer to contact the surface of the first through-substrate via, a width of the first bond pad being less than a width of the first through-substrate via; and a second integrated circuit die comprising a die connector bonded to the first bond pad.

A photonic assembly includes: an electronic integrated circuits (EIC) die including a semiconductor substrate, semiconductor devices located on a horizontal surface of the semiconductor substrate, first dielectric material layers embedding first metal interconnect structures, a dielectric pillar structure vertically extending through each layer selected from the first dielectric material layers, a first bonding-level dielectric layer embedding first metal bonding pads, wherein a first subset of the first metal bonding pads has an areal overlap with the dielectric pillar structure in a plan view; and a photonic integrated circuits (PIC) die including waveguides, photonic devices, second dielectric material layers embedding second metal interconnect structures, a second bonding-level dielectric layer embedding second metal bonding pads, wherein the second metal bonding pads are bonded to the first metal bonding pads.