A member for semiconductor manufacturing apparatus includes: a ceramic plate that has an upper surface including a wafer placement surface; a conductive base that is disposed on a lower surface of the ceramic plate; a first hole that extends through the ceramic plate; a second hole that extends through the conductive base; a porous plug that has an upper surface that is exposed from an upper opening of the first hole and a lower surface that is flush with or below an upper surface of the conductive base; an insulating pipe that has an upper surface that is located below the wafer placement surface and a lower surface that is located below the lower surface of the porous plug; and an integrally formed member that is obtained by integrally forming the porous plug and the insulating pipe.

A holding device for a fracturable assembly, which is intended to separate along a fracture plane defined between an upper part and a lower part of the fracturable assembly, comprises at least two protrusions configured to keep the fracturable assembly suspended in a substantially horizontal holding position, the protrusions being intended to be located between the upper part and the lower part, against a peripheral chamfer of the upper part; a support located below and at a distance from the protrusions so as to gravitationally receive the lower part when the fracturable assembly is separated, and to keep it at a distance from the upper part held by the protrusions.

A susceptor configured to hold one or more WBG (Wide Bandgap) semiconductor wafers for epitaxial layer growth to support a manufacture of at least one WBG semiconductor device. A susceptor is removed from an epitaxial reactor when a predetermined thickness of polycrystalline WBG semiconductor material builds up from growing epitaxial layers on one or more WBG semiconductor wafers. The susceptor is scanned by a laser such that the energy from the laser is absorbed by the one or more layers of polycrystalline WBG semiconductor material to decompose the one or more layers of polycrystalline WBG semiconductor material into two or more constituent components. The two or more constituent components are then removed from the susceptor by etching to produce a cleaned susceptor. The cleaned susceptor can then be placed in an epitaxial reactor to grow epitaxial wafers on WBG semiconductor wafers.

An edge ring used in a chamber comprises a cover with an internal space, a circuit board disposed in the internal space of the cover and at least one electrical element disposed on the circuit board. Here, the electrical element includes a temperature sensor, and temperature of the edge ring, heat distribution generated when ion bombardment occurs in plasma state or heat flux in the edge ring is measured by using the temperature sensor.

A load port control unit performs an opening operation of a sealable container according to a first operation procedure when a sensor has detected a normal placement of the sealable container, and retries the opening operation according to a second operation procedure for being able to more reliably perform the opening operation of the sealable container, to prevent a transfer device from stopping, when the sensor has detected a placement abnormality of the sealable container.

A semiconductor manufacturing apparatus includes a process container. A holder is disposed in the process container, and is arranged to hold a substrate including a first surface and a second surface on an opposite side to the first surface. The holder includes a mask portion that covers a first area of the first surface and exposes a second area different from the first area. The mask portion includes a first layer in contact with the first surface of the substrate and a second layer spaced further from the substrate than the first layer. The first layer is recessed further than the second layer in a direction toward the first area in an edge portion of the mask portion that partitions the first area and the second area.

Provided is a method capable of efficiently polishing the front and back sides of a carrier plate unused after manufacture, which is used in a double-sided polishing process for semiconductor wafers. The method comprises: sandwiching a carrier plate unused after manufacture and to be polished between an upper surface plate and a lower surface plate in the double-sided polishing apparatus, and supplying a polishing liquid while relatively rotating the carrier plate to be polished, the upper surface plate, and the lower surface plate to polish both sides of the carrier plate to be polished, wherein a polishing pad including, on its surface, an abrasive grain-containing layer in which abrasive grains of 2 m or more in grain size are embedded is used as a polishing pad in a double-sided polishing apparatus.

A wafer processing apparatus includes a rotating chuck rotatably installed on a driver, a vacuum chuck which is disposed on the rotating chuck and on which a wafer is seated, a chuck module installed in the rotating chuck to fix the wafer to the vacuum chuck, and a moving module configured to move the vacuum chuck or the chuck module to increase a gap between adjacent dies of the wafer.

A semiconductor device manufacturing device (10) includes a stage (12), an installing head (14) that has a chip holding surface (26) and disposes a chip (100) on a substrate (110), a measuring mechanism (16) that measures a tilt angle of the chip (100) loaded on an installing surface (112) of the substrate (110) by the installing head (14) with respect to the installing surface (112) as a detection tilt angle Sd, a holding surface adjusting mechanism (18) that changes a holding surface tilt angle Sb which is a tilt angle of the chip holding surface (26) with respect to a loading surface (21), and a controller (20) that calculates a correction amount C of the holding surface tilt angle Sb based on the detection tilt angle Sd and changes the holding surface tilt angle Sb by the holding surface adjusting mechanism (18) according to the calculated correction amount C.

A method for processing a semiconductor wafer is provided. The method includes transferring the semiconductor wafer above a wafer placement device having a plate to align an edge of the semiconductor wafer with a first buffer member positioned in a peripheral region of the plate and to align a center of the semiconductor wafer with a second buffer member positioned in a central region of the plate. Each of the first buffer member and the second buffer member has a stiffness that is less than that of the plate. The method further includes lowering down the semiconductor wafer to place the semiconductor wafer over the plate.