In one example, a semiconductor device includes a conductive structure having a conductive structure upper side. A roughening is on the conductive structure upper side and a groove is in the conductive structure extending partially into the conductive structure from the conductive structure upper side. An electronic component is attached to the conductive structure upper side with an attachment film. An encapsulant covers the electronic component, at least portions of the roughening, and at least portions of the conductive structure upper side. The groove has smoothed sidewalls that include substantially planarized portions of the roughening. The smooth sidewalls reduce flow of the attachment film across the conductive structure upper side to improve adhesion of the encapsulant to the conductive structure. Other examples and related methods are also disclosed herein.

An electronics assembly includes a plurality of planar conductive metal sheets including a first conductive metal sheet, a second conductive metal sheet attached and electrically coupled to the first metal sheet, and a third conductive metal sheet attached and electrically coupled to the second metal sheet. The second metal sheet is located between the first and third conductive metal sheets. Air gaps are defined in the plurality of planar conductive metal sheets to form metal traces that define electrically isolated conductive paths from an outer surface of the first conductive metal sheet to an outer surface of the third conductive metal sheet in a multilevel conductive wiring network. The multilevel conductive wiring network can be attached and electrically coupled to a microchip and to one or more capacitors to form a power converter.

A power module is provided. The power module is disposed on a main board. The power component includes a first surface, a second surface, a source terminal, a gate terminal and a drain terminal. The source terminal and the gate terminal are disposed on the first surface. The drain terminal is disposed on the second surface. The first solder layer is attached to the first surface and connected with the source terminal and the gate terminal. The first solder layer is disposed on a metal surface of the main board. The second solder layer is attached to the second surface and connected with the drain terminal. The drain terminal is away from the main board than the source terminal and the gate terminal. The conductive component is connected with the first solder layer and the second solder layer.

A semiconductor package includes: a molded body having opposite first and second sides; at least one semiconductor die encapsulated by the molded body; and a die carrier having opposite first and second sides. The semiconductor die is arranged over the first side of the die carrier. The second side of the die carrier is at least partially exposed from the second side of the molded body, forming at least one exposed portion of the die carrier. The first side of the molded body includes a first portion protruding from a second portion in a vertical direction perpendicular to the first side, forming a planar surface. The second portion extends completely along at least one edge of the first side. A center point of the first portion is in vertical alignment with a center point of the exposed portion.

In examples, a semiconductor package includes a solder joint pillar within a solder joint. The solder joint couples various structures of the semiconductor package.

A described example includes: a passive component die mounted to a device side surface of a semiconductor device die, and extending away from the device side surface of the semiconductor device die; the semiconductor device die and the passive component die flip chip mounted to a device mounting surface of a package substrate including a cavity extending into the package substrate from the device mounting surface of the package substrate, the cavity in a position corresponding to the passive component die, the passive component die extending into the cavity of the package substrate, and the package substrate having terminals on a board side surface; and mold compound covering the semiconductor device die, the passive component die, and the device mounting surface of the package substrate, the mold compound forming the body of a microelectronic device package, the terminals of the package substrate forming terminals of the microelectronic device package.

A low-inductance power module comprises a housing, upper-bridge MOSs, lower-bridge SBDs, lower-bridge MOSs, upper-bridge SBDs, output electrodes, a positive electrode and a negative electrode. A bottom plate is mounted inside the housing. An insulating substrate is mounted at the top of the bottom plate. A positive-electrode copper layer, a negative-electrode copper layer and an output-electrode copper layer are arranged on the upper surface of the insulating substrate. The output-electrode copper layer is divided into an upper-side output-electrode copper layer and a lower-side output-electrode copper layer.

A described example includes a method for fabricating an integrated circuit (IC) device. The method can include forming a mask on a surface of a multi-layer substrate, in which the multi-layer substrate includes at least one leadframe having spaced apart regions of copper distributed across and extending from the surface into at least one layer of the multi-layer substrate. The method can also include forming nanotwin copper bond pads on the surface of the multi-layer substrate over a respective region of the regions of copper. The method can also include removing the mask and forming a layer of an insulating material over the surface of the multi-layer substrate and around the nanotwin copper bond pad.

An optical coupling device includes a leadframe, a light-emitter, a light-receiver, and first to fourth resins. The light-emitter is located on the leadframe. The first resin is located on the leadframe. The first resin includes first and second portions. The first portion surrounds the light-emitter. The second portion is positioned between the first portion and the light-emitter. A first thickness of the first portion is greater than a second thickness of the second portion. The second resin is located between the light-emitter and the light-receiver in the first direction and is light-transmissive. The third resin is located between the second resin and the light-receiver and is light-transmissive. The fourth resin houses the light-emitter, the light-receiver, and the first to third resins and is light-shielding.