Patent classifications
H10W72/9223
METHOD OF MAKING A FAN-OUT SEMICONDUCTOR ASSEMBLY WITH AN INTERMEDIATE CARRIER
A method of making a semiconductor assembly may include mounting a plurality of components to a patterned element on an intermediate carrier, and disposing an encapsulant over the intermediate carrier, where the encapsulant may be disposed around four side surfaces of each of the plurality of components and one or more of the plurality of components may comprise conductive studs disposed over a front surface of the components. The method may further include removing a portion of the encapsulant to form a planar surface above the front surface, wherein the planar surface comprises ends of the conductive studs and a planar surface of the encapsulant. The method may further comprise removing the intermediate carrier through a grinding process, and terminating the grinding process when at least a portion of the patterned element is exposed.
Multilayer glass substrate
Embodiments herein relate to systems, apparatuses, techniques, or processes for packages that include multiple glass layers within the package. In embodiments, a core of the package may include multiple glass layers that may be bonded together, or may be separated by a dielectric layer between glass layers. In embodiments, the glass layers may include one or more electrically conductive features, such as conductive vias, conductive planes, electrical pads, electrical traces, redistribution layer, capacitors, inductors, active dies and/or passive dies. Other embodiments may be described and/or claimed.