H10W70/098

FAN-OUT WAFER LEVEL PACKAGING UNIT
20260018505 · 2026-01-15 ·

A fan-out wafer level packaging (FOWLP) unit which includes a substrate, a first dielectric layer, at least one antenna, at least one die, a second dielectric layer, at least one conductive pillar, a plurality of first conductive circuits, a third dielectric layer, a plurality of second conductive circuits, and an outer protective layer is provided. The first conductive circuits and the second conductive circuits are produced by filling a metal paste into slots and grinding the metal paste. The die is electrically connected with the antenna. The die is electrically connected to the outside through bonding pads around a chip area on a second surface of the die. Thereby the FOWLP unit is formed and problems of the FOWLP module or technology available now generated during manufacturing of the respective conductive circuits including higher manufacturing cost and less environmental benefit can be solved.

FABRICATION PROCESS AND SYSTEM FOR COPPER INTERCONNECTS

Additive manufacturing techniques are described. In one example, a method includes printing, using a printable copper ink, a layer of copper onto a substrate, applying a photonic sintering process to cure the layer of copper to produce a cured layer of copper, repeating, in an alternating manner, the printing and the photonic sintering process to individually print and cure a plurality of additional layers of copper over the cured layer of copper to produce a copper pillar having a selected height, and after forming the copper pillar to the selected height, depositing, onto the substrate, a dielectric material at least partially surrounding the copper pillar.

Semiconductor device and method of making a semiconductor package with graphene-coated interconnects

A semiconductor device includes a first substrate and a second substrate. A graphene-coated interconnect is disposed between the first substrate and second substrate. A semiconductor die is disposed between the first substrate and second substrate. The first substrate is electrically coupled to the second substrate through the graphene-coated interconnect. An encapsulant is deposited between the first substrate and second substrate.

SEMICONDUCTOR DEVICE WITH MOISTURE DIFFUSIVE THROUGH GLASS VIA STRUCTURE

A semiconductor device includes a glass interposer having a set of through glass vias (TGVs). At least one of the set of TGVs is filled with a moisture diffusive material.

Power module for vehicle

A power module for a vehicle, includes: a first substrate including a first metal circuit disposed on a 1-1st surface, and a first spacer extending from the first metal circuit in a first direction; a second substrate spaced from and facing the first substrate in a second direction, and including a second metal circuit disposed on a 2-1st surface facing the 1-1st surface, and a second spacer extending from the second metal circuit in the second direction; and a semiconductor chip disposed between the first substrate and the second substrate and including a power pad and a signal pad, the first spacer and the second spacer extending toward each other, and the second spacer including a 2-1st spacer connected to the power pad and a 2-2nd spacer connected to the signal pad.