Provided is a composition for forming an organic film which has both embedding and planarization properties, and a method for forming an organic film and a patterning process using the composition. A composition for forming an organic film, containing: (A) an aromatic ring-containing resin; (B) a polymer containing a repeating unit containing a -diketone structure represented by the following formula (1):

##STR00001## wherein L.sub.1 is a saturated or unsaturated linear or branched divalent hydrocarbon group having 2 to 20 carbon atoms, R.sub.A and R.sub.B each are a hydrogen atom, a substituted or unsubstituted linear alkyl group having 1 to 20 carbon atoms, a substituted or unsubstituted branched or cyclic alkyl group having 3 to 20 carbon atoms, a substituted or unsubstituted aliphatic unsaturated hydrocarbon group having 2 to 20 carbon atoms and containing one or more double or triple bonds, a substituted or unsubstituted heteroalkyl group having 1 to 30 carbon atoms, a substituted or unsubstituted aryl group having 6 to 30 carbon atoms, a thiol group, a hydroxy group, an amino group, a carboxy group, or a halogen group; and (C) a solvent.

A material for forming an adhesive film formed between a silicon-containing middle layer and a resist upper layer film, containing: (A) a resin having structural units shown by formula (1) and formula (2); (B) a thermal acid generator; and (C) an organic solvent, in the component (A), the structural unit shown by formula (1) having a molar fraction of 5% or more and the structural unit shown by formula (2) having a molar fraction of 30% or more. An objective is to provide a material for forming an adhesive film in a fine patterning process by a multilayer resist method in a semiconductor device manufacturing process, where the material gives an adhesive film that has high adhesiveness to a resist upper layer film, has an effect of suppressing fine pattern collapse, and also makes it possible to form an excellent pattern profile; a patterning process using the material. ##STR00001##

A patterning stack is provided. The patterning stack includes a bottom anti-reflective coating (BARC) layer over a substrate, a photoresist layer having a first etching resistance over the BARC layer, and a top coating layer having a second etching resistance greater than the first etching resistance over the photoresist layer. The top coating layer includes a polymer having a polymer backbone including at least one functional unit of high etching resistance and one or more acid labile groups attached to the polymer backbone or a silicon cage compound.

A method of forming a semiconductor structure includes forming a photoresist pattern on an anti-reflective layer on a wafer; forming an oxide layer on the anti-reflective layer and the photoresist pattern, wherein the oxide layer has a protruding portion overlapping the photoresist pattern; forming a polish stop layer along a top surface of the oxide layer; forming a buffer layer on the polish stop layer; polishing the buffer layer such that at least a portion of the buffer layer is removed and the polish stop layer is exposed; and etching the buffer layer, the polish stop layer and the oxide layer such that the photoresist pattern is exposed.

A method for manufacturing a semiconductor structure includes operations as follows. A substrate is provided, and a mask layer is formed on the substrate. An etching process is performed to form a plurality of first trenches in the mask layer, where the first trench has an inverted trapezoid cross-sectional shape. An epitaxy layer is formed on the substrate, where the epitaxy layer is filled in each of the first trenches to form an active area. The mask layer is removed to form a plurality of second trenches, where the second trench is arranged between adjacent active areas, and the second trench has a regular trapezoid cross-sectional shape. A dielectric layer is filled in the second trench to form an isolation structure.

Methods for preparing a nanotube membrane for use in a pellicle membrane using dry printing are disclosed. Nanotube fibers are produced in a reaction vessel and dry sprayed onto a filter to form the nanotube membrane. The thickness of the nanotube membrane can be controlled by moving the reaction vessel and the filter relative to each other, or by further processing to reduce the thickness of the layer deposited onto the filter. This method reduces the number of process steps, reducing overall production time, and can also be used to produce larger membranes. The pellicle membrane can be formed with multiple layers and has a combination of high transmittance, low deflection, and small pore size. A conformal coating may applied to an outer surface of the pellicle membrane to protect the pellicle membrane from damage that can occur due to heat and hydrogen plasma created during EUV exposure.

Exemplary semiconductor processing methods may include depositing a metal-doped boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The metal-doped boron-containing material may include a metal dopant comprising tungsten. The substrate may include a silicon-containing material. The methods may include depositing one or more additional materials over the metal-doped boron-containing material. The one or more additional materials may include a patterned photoresist material. The methods may include transferring a pattern from the patterned photoresist material to the metal-doped boron-containing material. The methods may include etching the metal-doped boron-containing material with a chlorine-containing precursor. The methods may include etching the silicon-containing material with a fluorine-containing precursor. The metal dopant may enhance an etch rate of the silicon-containing material. The methods may include removing the metal-doped boron-containing material from the substrate with a halogen-containing precursor.

A semiconductor device includes a substrate. The semiconductor device further includes a conductive structure in the substrate. The semiconductor device further includes an etch stop layer over the substrate. The semiconductor device further includes an interlayer dielectric (ILD) over the etch stop layer. The semiconductor device further includes a dual damascene conductive element in the ILD, wherein the dual damascene conductive element extends through the etch stop layer to electrically connect to the conductive structure, and the dual damascene conductive element has a line end roughness (LER) ranging from 3.3 nanometers (nm) to 5.3 nm.

The present disclosure provides a method of manufacturing a semiconductor structure. A substrate is provided. A multi-layer structure is formed over the substrate, wherein the multi-layer structure includes a semiconductive material layer and an oxide layer over the semiconductive material layer. The oxide layer is patterned to form a first patterned layer. A second patterned layer is formed on the semiconductive material layer and alternately arranged with the first patterned layer. A first etching operation is performed on the substrate using a comprehensive pattern of the first patterned layer and the second patterned layer.

A photoresist includes a solvent, a polymer and an additive. The polymer is dissolved in the solvent, and the additive is dispersed in the solvent. The additive includes a double bond or includes an epoxy group. The additive has a surface tension different from a surface tension of the polymer.