Patent classifications
H10W70/433
LOADING FRAME FOR HIGH I/O COUNT PACKAGED SEMICONDUCTOR CHIP
An apparatus is described. The apparatus includes a loading frame for mounting a packaged semiconductor chip and a heat sink for the packaged semiconductor chip to a socket. The loading frame is comprised of metal. The loading frame has at least one frame leg where the metal is folded to re-enforce a strength of the frame leg.
LEAD-WIRE FRAME STRUCTURE FOR PACKAGING AND SENSOR PACKAGE STRUCTURE
A lead-wire frame structure for packaging and a sensor package structure, which are applied to the field of sensor preparation. The lead-wire frame structure comprises: a bonding-pad component and a plurality of pin components, wherein the bonding-pad component is provided with an inward recess in a plane direction of a coplane which is formed by the bonding-pad component and the plurality of pin components. In the plane direction, arc-shaped packaging interfaces for offsetting stresses are formed in an aligned manner on an inner contour of the recess and an outer contour of the recess in the bonding-pad component. In the present application, the bonding-pad component is provided with the inward recess in the plane direction, and the aligned packaging interfaces of the inner contour of the recess and the outer contour of the recess arc designed to be of arc-shaped structures, which can offset internal and external stresses.
Semiconductor device
A semiconductor device includes a laminate including a semiconductor element, an insulating substrate on a first surface of the semiconductor element, an interconnect on the insulating substrate, and an interconnect member on a second surface of the semiconductor element. The interconnect is electrically connected to a first electrode in the first surface of the semiconductor element through a through hole in the insulating substrate. The interconnect member is electrically connected to a second electrode in the second surface of the semiconductor element. The semiconductor device further includes first and second elastic terminals holding the laminate therebetween. The first terminal includes a bulge that engages with a depression in the interconnect. The second terminal contacts the interconnect member. The semiconductor device further includes a fixing member fixing the first terminal and the second terminal while electrically isolating the first terminal and the second terminal from each other.