Various embodiments of the present technology may provide a method for fabricating a semiconductor structure. The method may include receiving a source substrate having a dielectric layer and a conductive feature, selectively depositing a barrier layer only on a top surface of the conductive feature, modifying a top surface of the dielectric layer, and removing the barrier layer after modifying the dielectric layer. The method may also include cleaning a top layer of the dielectric and conductive feature prior to depositing the barrier layer.

A substrate processing apparatus that processes a substrate using atmospheric pressure plasma includes a stage configured to support a substrate, a gas supply device configured to supply a mixed gas including an inert gas and a process gas, a reactor configured to receive the mixed gas from the gas supply device and generate plasma at atmospheric pressure, wherein the plasma generated from the reactor is configured to process a surface of the substrate. The gas supply device may include a gas supply unit configured to supply the inert gas, a flow rate controller configured to control a flow rate of a liquid process gas, and a vaporizer configured to vaporize the liquid process gas supplied from the flow rate controller.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

Devices and methods for forming semiconductor devices are disclosed. The semiconductor device can include a plurality of semiconductor wafers. The plurality of semiconductor wafers can have a dielectric bonding layer disposed thereupon. The dielectric bonding layers can be treated to increase a bonding energy with other semiconductor wafers. A wafer having a treatment applied to a bonding layer can be bonded to another wafer.

Disclosed herein are display systems with multiple display packages. In some examples, a first display package includes a first LED die and a first backplane die. The first LED die includes a wire interface that is symmetric about a first plane. The first backplane die includes input/output (I/O) pads that are electrically connected to the wire interface and symmetric about a second plane, perpendicular to the first plane. A similarly configured second display package includes a second LED die with a wire interface identical in layout to that of the first LED die, and a second backplane die with I/O pads identical in layout to that of the first backplane die. The second LED die can be positioned with respect to the second backplane die as a mirror reflection across the second plane of the position of the first LED die with respect to the first backplane die.

A package includes a first die, a second die, an encapsulant, and through insulating vias (TIV). The first die has a first bonding structure. The first bonding structure includes a first dielectric layer and first connectors embedded in the first dielectric layer. The second die has a semiconductor substrate and a second bonding structure over the semiconductor substrate. The second bonding structure includes a second dielectric layer and second connectors embedded in the second dielectric layer. Sidewalls of the second dielectric layer are aligned with sidewalls of the semiconductor substrate. The first connectors are in physical contact with the second connectors. The first connectors and the second connectors are arranged on two opposite sides of an interface between the first dielectric layer and the second dielectric layer. The encapsulant laterally encapsulates the second die. The TIVs are aside the second die.

An element chip production method includes: a preparation step of preparing a substrate having a first principal surface and a second principal surface and including a first layer being a semiconductor layer and a second layer formed on the first principal surface side of the first layer and including an insulator, the substrate having a plurality of element regions and a division region defining the element regions; a first protective layer formation step of forming, on the upper surface of the second layer, a first protective layer having a first opening from which the division region is exposed; a first groove formation step of forming a first groove by performing etching on a part of the second layer exposed from the first opening; a second protective layer formation step of forming a second protective layer on the surface of the second layer; a laser grooving step; and a dicing step.

An element includes a substrate and a surface layer on the substrate. The surface layer includes at least one first region comprising an optically transparent and electrically insulative first material and at least one second region at least partially embedded in the at least one first region. The at least one second region comprises an optically transparent and electrically conductive second material.

Disclosed herein are methods for direct bonding. In some embodiments, the direct bonding method includes providing a first element having a first bonding surface, providing a second element having a second bonding surface, slightly etching the first bonding surface, treating the first bonding surface with a terminating liquid treatment to terminate the first bonding surface with a terminating species, and directly bonding the first bonding surface to the second bonding surface without the use of an intervening adhesive and without exposing the first bonding surface to plasma.

A method of bonding a semiconductor element to a substrate is provided. The method includes the steps of: (a) carrying the semiconductor element with a bonding tool, the semiconductor element including a first plurality of conductive structures; (b) supporting the substrate with a support structure, the substrate including a second plurality of conductive structures; (c) heating at least one of the first plurality of conductive structures and the second plurality of conductive structures such that at least one of (i) the first plurality of conductive structures and (ii) the second plurality of conductive structures expands; (d) bonding the first plurality of conductive structures to corresponding ones of the second plurality of conductive structures; and (e) bonding a dielectric surface of the semiconductor element to a dielectric surface of the substrate after step (d).