A semiconductor device according to the present disclosure includes a gate-all-around (GAA) transistor in a first device area and a fin-type field effect transistor (FinFET) in a second device area. The GAA transistor includes a plurality of vertically stacked channel members and a first gate structure over and around the plurality of vertically stacked channel members. The FinFET includes a fin-shaped channel member and a second gate structure over the fin-shaped channel member. The fin-shaped channel member includes semiconductor layers interleaved by sacrificial layers.

A semiconductor device includes a fin structure that protrudes vertically out of a substrate, wherein the fin structure contains silicon germanium (SiGe). An epi-silicon layer is disposed on a sidewall of the fin structure. The epi-silicon layer contains nitrogen. One or more dielectric liner layers are disposed on the epi-silicon layer. A dielectric isolation structure is disposed over the one or more dielectric liner layers.

A wafer transfer carrier includes a container and a lid portion. The container accommodates a wafer and a liquid, and is movable in a state where the wafer is in contact with the liquid. The lid portion is capable of sealing an inside of the container.

Selective gas etching for self-aligned pattern transfer uses a first block and a separate second block formed in a sacrificial layer to transfer critical dimensions to a desired final layer using a selective gas etching process. The first block is a first hardmask material that can be plasma etched using a first gas, and the second block is a second hardmask material that can be plasma etched using a second gas separate from the first gas. The first hardmask material is not plasma etched using the second gas, and the second hardmask material is not plasma etched using the first gas.

Described herein is a method of using a composition for selectively etching a silicon layer in the presence of an n-doped silicon layer at a temperature from 10 to 50 C., the composition including: (a) 0.1 to 15% by weight of a selectivity enhancer selected from the group consisting of a C.sub.1 to C.sub.20 primary alkylamine, a C.sub.1 to C.sub.20 secondary alkylamine, a C.sub.1 to C.sub.20 primary alkanolamine, and a C.sub.1 to C.sub.20 secondary alkanolamine; and (b) water; where the n-doped silicon has a content of from 10.sup.16 cm.sup.3 to 10.sup.22 cm.sup.3 of a group 13 or 15 element.

Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method comprises forming a fin over a substrate, wherein the fin comprises a first semiconductor layer and a second semiconductor layer including different semiconductor materials, and the fin comprises a channel region and a source/drain region; forming a dummy gate structure over the channel region of the fin and over the substrate; etching a portion of the fin in the source/drain region to form a trench therein, wherein a bottom surface of the trench is below a bottom surface of the second semiconductor layer; selectively removing an edge portion of the second semiconductor layer in the channel region such that the second semiconductor layer is recessed; forming a sacrificial structure around the recessed second semiconductor layer and over the bottom surface of the trench; and epitaxially growing a source/drain feature in the source/drain region of the fin.

A semiconductor device includes a substrate. The semiconductor device further includes a gate structure extending along a first direction. The semiconductor device further includes a first source/drain (S/D) region. The semiconductor device further includes a second S/D region separated from the first S/D region in the first direction. The semiconductor device further includes a backside via extending through the substrate, wherein the backside via is between the first S/D region and the second S/D region. The semiconductor device further includes a silicide layer between a sidewall of the first S/D region and the backside via, wherein the backside via contacts the silicide layer. The semiconductor device further includes a first dielectric spacer between the backside via and the second S/D region, wherein the backside via contacts the first dielectric spacer.

The present disclosure relates to an etching liquid containing an alkaline compound (A) and at least one compound (B) selected from the group consisting of an oxidizing agent (B1) and a cationic surfactant (B2).