Patent classifications
H10W46/601
Method for producing an electronic component assembly on the front face of a semi-conductor wafer
The invention concerns a method of manufacturing an assembly of electronic components (3) on the front surface of a semiconductor wafer (1) comprising a plurality of field areas (4), each area (4) comprising at least one field (2) and each field (2) comprising at least one electronic component (3). The method comprises a plurality of photolithography steps to form a stack of layers forming each electronic component (3), each photolithography step comprises the application of a mask successively on each field (2) in photolithography equipment. One of the masks further comprises an identification pattern, said mask being called identification mask. At the photolithography step associated with the identification mask, as least one photolithographic parameter of the photolithography equipment is different for each field area (4), to expose the identification pattern differently in each field area (4).
METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR CHIP HAVING INTERNAL AND EXTERNAL MARKS
A method for manufacturing a semiconductor package includes forming a first semiconductor chip having a first bonding surface, the first semiconductor chip including a first outermost insulating layer providing the first bonding surface, a first internal insulating layer on the first outermost insulating layer, a first external marks within the first outermost insulating layer, and a first internal mark within the first internal insulating layer. The first external marks include a first pattern having a first center portion and a second pattern having a first ring portion surrounding the first center portion when viewed in a plan view, the first internal mark is disposed between the first center portion and the first ring portion when viewed in the plan view, and the first external marks and the first internal mark together form a first alignment structure.