An electronic device and a method of manufacturing an electronic device are provided. The electronic device includes a first conductive layer and a first power die. The first conductive layer including a first part and a second part separated from the first part. The first power die is disposed above the first conductive layer and has a first surface. The first power die includes a first terminal exposed from the first surface and a second terminal exposed from the first surface. The first part is electrically connected to the first terminal and the second part is electrically connected to the second terminal.

In embodiments of the present disclosure, enhanced nanoribbons of GAA FETs are formed using a high-temperature diffusion process before the source/drain regions are formed. The diffusion process includes forming an additive material layer (e.g., comprising germanium) around crystalline nanoribbons (e.g., comprising purely or predominantly silicon), forming a capping layer around the additive material layer, diffusing the additive material into the crystalline nanoribbons (e.g., via heating), and removing the capping layer.