A bonded substrate structure includes a first substrate; a second substrate; and a bonding region bonding the first substrate to the second substrate. The bonding region includes an aluminum oxide bonding layer directly contacting an aluminum nitride layer, and a bonding interface between the aluminum oxide bonding layer and a bonding surface of the first substrate or the second substrate.

A semiconductor device according to an embodiment includes a semiconductor chip, a substrate, and an adhesive layer. The substrate supports the semiconductor chip. The adhesive layer is disposed between the semiconductor chip and the substrate. The adhesive layer bonds the semiconductor chip and the substrate. The adhesive layer has a first portion and a plurality of second portions. The first portion is formed of a first material. The plurality of second portions are formed of a second material. The second material has a greater elastic modulus and a greater thermal conductivity than the first material. The second portions are located inside the first portion. Each of the second portions is in contact with and connects the semiconductor chip and the substrate.

The purpose of this invention is to provide a semiconductor device that prevents defects in semiconductor elements caused by differences in thermal expansion and maintains low electrical resistance by directly or indirectly laminating an FeNi alloy metal layer onto the front-surface or back-surface electrodes of the semiconductor element. In this invention, an FeNi alloy metal layer is directly or indirectly applied on the surface electrodes of the semiconductor element, and the semiconductor element is connected to a conductor through the FeNi alloy metal layer. Depending on the application, the Ni content of the FeNi alloy metal layer is set within the range of 36% to 45% by weight, and the thickness of the FeNi alloy metal layer is set within the range of 2 m to 20 m.

The present disclosure describes a bonded semiconductor structure and a method of forming the bonded semiconductor structure. The bonded semiconductor structure includes first and second substrates bonded with a bonding structure. The bonding structure provides high thermal conductivity and high bonding strength between the first and second substrates. The bonding structure includes bonding layers and adhesion layers, with the bonding layers including titanium oxide and the adhesion layers including titanium nitride. The method includes forming a first adhesion layer on the first substrate and a second adhesion layer on the second substrate. The method also includes forming a first bonding layer on the first adhesion layer and a second bonding layer on the second adhesion layer. The method further includes bonding the first and second substrates by bonding the first and second bonding layers together.

The disclosure is directed to wide band-gap semiconductor devices, such as power devices based on silicon carbide or gallium nitride materials. A power device die is attached to a carrier substrate or a base using sintered silver as a die attachment material or layer. The carrier substrate is, in some embodiments, copper plated with silver. The sintered silver die attachment layer is formed by sintering silver nanoparticle paste under a very low temperature, for example, lower than 200 C. and in some embodiments at about 150 C., and with no external pressures applied in the sintering process. The silver nanoparticle is synthesized through a chemical reduction process in an organic solvent. After the reduction process has completed, the organic solvent is removed through evaporation with a flux of inert gas being injected into the solution.

The invention relates to a sintering paste consisting of: (A) 30 to 40 wt. % of silver flakes with an average particle size ranging from 1 to 20 m, (B) 8 to 20 wt. % of silver particles with an average particle size ranging from 20 to 100 nm, (C) 30 to 45 wt. % of silver(I) oxide particles, (D) 12 to 20 wt. % of at least one organic solvent, (E) 0 to 1 wt. % of at least one polymer binder, and (F) 0 to 0.5 wt. % of at least one additive differing from constituents (A) to (E).

A semiconductor package structure includes a first package component, a second package component disposed over the first package component, a plurality of connectors between the first package component and the second package component, an underfill between the first package component and the second package component and surrounding the plurality of connectors, and a plurality of heat sink fibers in the underfill. A thermal conductivity of the plurality of heat sink fibers is greater than a thermal conductivity of the underfill.

Integrated circuit (IC) structures and electronic packages that utilized an inorganic-convertible polymer to improve bond strength and thermal conductivity are described. In one embodiment, the inorganic-convertible polymer acts as a side fill material to seal a die periphery and improve direct bonding strength. In another embodiment, the inorganic-convertible polymer acts as a thermal bonding layer to increase the thermal conductivity between a die and a thermal solution.

A method for manufacturing sinter bonding film, includes: preparing a resin formulation; preparing a metal filler mixture; mixing the resin formulation and the metal filler mixture, thereby preparing a paste for film manufacturing; and manufacturing a sinter bonding film by using the paste for film manufacturing. The metal filler mixture includes a metal powder and a reducing agent, copper metal (Cu) corresponds to respective particles in the metal powder, and the surface of the respective particles in the metal powder undergoes acid treatment or non-treatment.

Systems and methods plasma dicing are provided. The method includes forming a mask layer on a first surface of a wafer. The mask layer includes scribe lines and the wafer is diced along the scribe lines. The method also includes forming a die attach layer of a photo patternable material on a second surface of the wafer opposite the first surface. The method further includes patterning the die attach layer to form a number of openings in the die attach layer in a predetermined pattern. The method yet further includes applying a dicing tape to the die attach layer. The method includes dicing the wafer along the scribe lines to form dies of a plurality of dies supported by the dicing tape, a die of the plurality of dies having the die attach layer of the photo patternable material.