Patent classifications
H10P95/60
METHOD OF MANUFACTURING LAMINATED WAFER WITH PROCESSED OUTER CIRCUMFERENCE, METHOD OF MANUFACTURING DEVICE CHIPS, AND APPARATUS FOR PROCESSING LAMINATED WAFER
A method of manufacturing a laminated wafer with a processed outer circumference includes acquiring a value of joint misalignment between a first wafer and a second wafer of the laminated wafer by measuring the positions of outer circumferences of the first and second wafers, holding the second wafer of the laminated wafer on a holding surface of a holding mechanism, acquiring the position of the first wafer with respect to the holding mechanism while the laminated wafer is being held by the holding mechanism, acquiring the position of the second wafer with respect to the holding mechanism on the basis of the acquired value of joint misalignment and the acquired position of the first wafer, and processing the outer circumference of the first wafer on the basis of the acquired position of the second wafer as a reference.
IC chip mounting device and IC chip mounting method
The present invention is an IC chip mounting apparatus including: a conveyor configured to convey an antenna continuous body on a conveying surface, the antenna continuous body having a base material and plural inlay antennas continuously formed on the base material; an IC chip placement unit configured to place an IC chip on a photo-curable adhesive that is located on a reference position of each antenna in the antenna continuous body; and a light irradiator configured to irradiate, with light, the adhesive of each antenna of the antenna continuous body that is conveyed by the conveyor, wherein the light irradiator is configured to irradiate the adhesive of each antenna with the light, while the IC chip on the adhesive is pressed to the antenna.
MANUFACTURING METHOD
A method is of manufacturing a plurality of devices by dividing a device wafer along a plurality of planned dividing lines intersecting each other, the device wafer having a device surface on which each of the devices is formed in each of regions partitioned by the planned dividing lines. The method includes: directly bonding a carrier plate to the device surface of the device wafer; after the bonding of the carrier plate, dicing the device wafer supported by the carrier plate along the planned dividing lines to thereby form a plurality of devices; and after the forming of the plurality of devices, separating the plurality of devices from the carrier plate.