An electronic device includes a substrate having first and second conductive traces, a semiconductor die having a transistor with a first terminal and a second terminal, and first and second metal clips. The first metal clip has a first end portion coupled to the first terminal of the transistor, and a second end portion coupled to the first conductive trace of the substrate. The second metal clip has a first end portion coupled to the second terminal of the transistor and a second end portion coupled to the second conductive trace of the substrate, and a middle portion of the second metal clip is spaced apart from and at least partially overlying a portion of the first metal clip.

The purpose of this invention is to provide a semiconductor device that prevents defects in semiconductor elements caused by differences in thermal expansion and maintains low electrical resistance by directly or indirectly laminating an FeNi alloy metal layer onto the front-surface or back-surface electrodes of the semiconductor element. In this invention, an FeNi alloy metal layer is directly or indirectly applied on the surface electrodes of the semiconductor element, and the semiconductor element is connected to a conductor through the FeNi alloy metal layer. Depending on the application, the Ni content of the FeNi alloy metal layer is set within the range of 36% to 45% by weight, and the thickness of the FeNi alloy metal layer is set within the range of 2 m to 20 m.

A semiconductor module includes a laminate substrate including an insulating plate and first and second circuit boards on an upper surface of the insulating plate, the first semiconductor device on an upper surface of the first circuit board, a first main terminal, and a first metal wiring board that electrically connects the first semiconductor device to the first main terminal. The first metal wiring board has a first bonding section bonded to an upper surface electrode of the first semiconductor device, a second bonding section bonded to an upper surface of the second circuit board, a first coupling section that couples the first bonding section to the second bonding section, a first raised section that rises upward from an end portion of the second bonding section. The first raised section has an upper end that is electrically connected to the first main terminal.

A semiconductor device includes a first die pad having a main surface, a second die pad having a second main surface, a first switching element connected to the first main surface, a second switching element connected to the second main surface, a first connecting member connecting the first main surface electrode of the first switching element to the second die pad, an encapsulation resin encapsulating the first switching element, the second switching element, the first die pad, the second die pad, and the first connecting member, and leads projecting out of one of the resin side surfaces of the encapsulation resin.

A connector for contacting a semiconductor chip. The connector may include a tab, where the tab includes an outer portion, having a planar shape, the outer portion having a lower surface, adapted to contact a surface of the semiconductor chip, and an upper surface that defines a main plane of the tab. The tab may also include a ring portion, the ring portion connected to the outer portion and extending proud of the main plane, wherein the ring portion defines an inner hole within the tab structure, the inner hole being adapted to expose a contact portion of the surface of the semiconductor chip, wherein the ring portion includes at least two slots. The connector may further include a clip, comprising a connection portion, the connection portion having an aperture that is adapted to couple around the ring portion.

Semiconductor module including a semiconductor and including a shaped metal body that is electrically contacted by the semiconductor, for forming a contact surface for an electrical conductor, wherein the shaped metal body is bent or folded. A method is also described for establishing electrical contacting of an electrical conductor on a semiconductor, said method including the steps of: fastening a bent or folded shaped metal body of a constant thickness to the semiconductor by means of a first fastening method and then fastening the electrical conductor to the shaped metal body by means of a second fastening method.

A transistor package includes a transistor chip having opposing first and second main sides, and a first load electrode and a second load electrode on the first main side, with a carrier facing the second main side. A first terminal post is arranged laterally beside the transistor chip. A second terminal post is arranged laterally beside the transistor chip on an opposite side. A first clip connects the first load electrode to the first terminal post. A second clip connects the second load electrode to the second terminal post. At least one of the clips includes a first contact element which projects from a first side wall of the clip and is bent downwards in a direction towards the transistor chip to electrically contact the first or second load electrode of the chip, a bending axis being in a longitudinal direction of the clip.

A power package includes at least one power substrate having at least one power trace, at least one power device on the at least one power trace, signal terminals, and at least one signal connection assembly. The at least one signal connection assembly includes at least one of the following: at least one signal trace that is thinner than the at least one power trace; at least one embedded routing layer within the at least one power substrate; and/or at least one routing layer on the at least one power substrate.

A sensor package structure and a manufacturing method thereof are provided. The sensor package structure includes a substrate, a first solder mask layer, a convex structure, a sensing chip, and an engaging layer. The first solder mask layer is disposed on the substrate. The convex structure is disposed on the first solder mask layer. The convex structure has a first stepped surface, and the first stepped surface is higher than an upper surface of the first solder mask layer. The sensing chip is disposed above the substrate. The engaging layer is adhered between the substrate and the sensing chip and covers the convex structure, such that the convex structure and the sensing chip are not in contact with each other.