Provided herein include various examples of an apparatus, a sensor system and examples of a method for manufacturing aspects of an apparatus, a sensor system. The method may include forming bumps on a surface of one or more electrical contacts, where the one or more electrical contacts are accessible on an upper surface of a die, where the die is oriented on a substrate, and where the electrical contacts comprise bonding pads. The method may also include coupling one or more additional electrical contacts to the one or more electrical contacts, where the coupling comprises wire-bonding each additional electrical contact of the additional electrical contacts to one of the one or more electrical contacts accessible on the upper surface of the die, via a portion of the bumps on the surface of the one or more electrical contacts, thereby forming wire-bonded connections.

A semiconductor module arrangement includes: a housing; a substrate arranged in or forming a bottom of the housing; a bus bar including a first end and a second end opposite the first end, the first end being arranged inside the housing and the second end extending to outside of the housing; and at least one connecting element mechanically and electrically coupled to a top surface of the substrate. The first end of the bus bar is arranged distant from the substrate in a vertical direction. The vertical direction is a direction perpendicular to the top surface of the substrate. The first end of the bus bar is electrically coupled to at least one of the at least one connecting element by one or more electrical connections.

A semiconductor die is proposed, wherein the semiconductor die comprises a microelectronic section and a sensor section. The microclectronic section comprises an integrated circuit. The sensor section adjoins an edge of the semiconductor die. A sensor is also proposed, which comprises such a semiconductor die.

The present disclosure discloses a method of fabricating a semiconductor integrated circuits package with solder wettable plating and relates to a semiconductor package substrate with side wettable flank (SWF) features and a method of manufacturing thereof. In particular, the disclosure relates to leadless semiconductor devices and an associated method of manufacturing such devices. An object of the present disclosure is to provide a manufacturing technique allowing full plating of the side flanks by conventional electro-plating with an external conductive media.

The disclosure is directed to wide band-gap semiconductor devices, such as power devices based on silicon carbide or gallium nitride materials. A power device die is attached to a carrier substrate or a base using sintered silver as a die attachment material or layer. The carrier substrate is, in some embodiments, copper plated with silver. The sintered silver die attachment layer is formed by sintering silver nanoparticle paste under a very low temperature, for example, lower than 200 C. and in some embodiments at about 150 C., and with no external pressures applied in the sintering process. The silver nanoparticle is synthesized through a chemical reduction process in an organic solvent. After the reduction process has completed, the organic solvent is removed through evaporation with a flux of inert gas being injected into the solution.

A described example includes a method for fabricating an integrated circuit (IC) device. The method can include forming a mask on a surface of a multi-layer substrate, in which the multi-layer substrate includes at least one leadframe having spaced apart regions of copper distributed across and extending from the surface into at least one layer of the multi-layer substrate. The method can also include forming nanotwin copper bond pads on the surface of the multi-layer substrate over a respective region of the regions of copper. The method can also include removing the mask and forming a layer of an insulating material over the surface of the multi-layer substrate and around the nanotwin copper bond pad.