A component carrier includes a stack with electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures have a higher density connection region and a lower density connection region, and a first component and a second component which are surface mounted on the stack. The first component and the second component are electrically coupled with each other by the higher density connection region.

A circuit board according to an embodiment includes an insulating layer; and, an electrode part disposed in the insulating layer, wherein the electrode part includes: a first electrode; a second electrode disposed on the first electrode; and first and second via electrodes disposed between the first electrode and the second electrode, the first via electrode is connected to the first electrode and the second electrode, and a length of the second via electrode in a vertical direction is smaller than a length of the first via electrode in the vertical direction.

In an embodiment, a device includes: an integrated circuit die including a die connector; a dielectric layer on the integrated circuit die; an under-bump metallurgy layer having a line portion on the dielectric layer and having a via portion extending through the dielectric layer to contact the die connector; a through via on the line portion of the under-bump metallurgy layer, the through via having a first curved sidewall proximate the die connector, the through via having a second curved sidewall distal the die connector, the first curved sidewall having a longer arc length than the second curved sidewall; and an encapsulant around the through via and the under-bump metallurgy layer.