A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a channel layer, a gate element on the channel layer, and source/drain elements at least partly embedded in the channel layer. The source/drain elements are on opposite sides of the gate element. The source/drain elements include a metal element and a lower silicide element between the metal element and the channel layer. The lower silicide element has a hydrogen content less than 2 at %.

A method for forming ohmic contacts on a compound semiconductor device is disclosed. A channel layer is formed on a substrate. A barrier layer is formed on the channel layer. A passivation layer is formed on the barrier layer. A contact area is formed by etching through the passivation layer and the barrier layer. The channel layer is partially exposed at a bottom of the contact area. A sacrificial metallic layer is conformally deposited on the contact area. The sacrificial metallic layer is subjected to an annealing process, thereby forming a heavily doped region in the channel layer directly under the sacrificial metallic layer. The sacrificial metallic layer is removed to expose the heavily doped region. A metal silicide layer is formed on the heavily doped region.

A semiconductor device of an embodiment includes a first nitride region being nitride selected from aluminum gallium nitride and aluminum nitride, the first nitride region being an n-type semiconductor, and a second gallium nitride region in contact with the first nitride region, the second gallium nitride region being the nitride, the second gallium nitride region being metal, the second gallium nitride region containing a first element being at least one element selected from a group consisting of Be, Mg, Ca, Sr, Ba, Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, V, Nb, Ta, Li, Na, K, Rb, Ce, and Zn.

Described herein are IC devices that include molybdenum or a molybdenum compound, such as compounds including oxygen or nitrogen. The molybdenum may be deposited at a high concentration, e.g., at least 50% atomic density. Also described herein are mid-valent molybdenum precursors for depositing molybdenum, and reactions for producing the mid-valent molybdenum precursors. For example, the molybdenum precursors may be generated by reacting a higher-valent molybdenum compound with an amidinate or a formamidinate.

A semiconductor structure includes a group III-V device, a dielectric layer over the group III-V device, and a contact hole in the dielectric layer over the group III-V device. A nickel-platinum (NiPt) liner is situated in the contact hole directly contacting the group III-V device. The NiPt liner may have a Ni composition from approximately forty percent to approximately ninety five percent (40% Ni 95%). The NiPt liner may directly contact P type gallium arsenide (GaAs). A contact resistivity between the NiPt liner and the group III-V device may be approximately one micro-Ohm-centimeter-squared (approximately 1 10.sup.6 cm.sup.2).

A method of forming ohmic contacts on a semiconductor structure having a p-type region and an n-type region includes depositing a first metal on the n-type region, annealing the structure at a first contact anneal temperature to form a first ohmic contact on the n-type region, depositing a second metal on the first ohmic contact and on the p-type region, and annealing the structure at a second contact anneal temperature, less than the first contact anneal temperature, to form a second ohmic contact on the p-type region.