H10W70/475

LEAD FRAME DEVICE WITH SHARED TERMINAL
20260060099 · 2026-02-26 ·

A method of manufacturing a semiconductor device includes providing a conductive frame defining first and second rails, a first terminal disposed between the rails, and a plurality of second terminals extending toward the first terminal from one or both of the rails, disposing a plurality of unencapsulated stacks of capacitor(s) on the frame, each of the stacks having electrically isolated first and second contacts and being disposed with the first contact electrically connected to the first terminal and the second contact electrically connected to one of the second terminals, encapsulating the plurality of stacks, and removing the rails from the frame. The method may include electrically connecting the first terminal to a ground line of the semiconductor device and electrically connecting each of the second terminals to a respective power rail of the semiconductor device associated with a respective voltage potential.

Semiconductor Device and Method of Disposing Electrical Components Above and Below Substrate

A semiconductor device has a substrate with a die mounting site and a plurality of leads. A first electrical component is disposed over a first surface of the die mounting site. A second electrical component is disposed over a second surface of the die mounting site opposite the first surface of the die mounting site. A first bond wire is coupled between the first electrical component and a first lead, and a second bond wire is coupled between the second electrical component and a second lead. A first encapsulant is deposited over the first electrical component, and a second encapsulant is deposited over the second electrical component with the leads exposed between the first encapsulant and second encapsulant. The leads are exposed from the first encapsulant and second encapsulant on a side of the semiconductor device.

PACKAGE SUBSTRATE INCLUDING PASSIVE DEVICES EMBEDDED WITH CONTACT SURFACES ORTHOGONAL TO A PLANE OF SUBSTRATE AND RELATED METHODS
20260040971 · 2026-02-05 ·

Passive devices may be embedded into a cavity in a package substrate, with electrical contacts of the passive device on a contact surface orthogonal to a surface of the package substrate and extending through the package substrate. The electrical contacts of the passive device may be coupled to vias coupled to a power supply to provide capacitive decoupling. One or more through-hole vias (THVs), which provide current to ICs on the package substrate, may be excluded from the package substrate to accommodate the passive device. Embedding the passive devices in the cavity of the package substrate with the contact surface orthogonal to, rather than parallel to, the surface of the package substrate, reduces an area occupied by the passive device. In this manner, a number of the THVs excluded from the package substrate is reduced, which results in a smaller impact to the resistance of the power supply network.

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

In one example, an electronic device comprises a substrate comprising a first side and a second side opposite the first side, wherein the substrate comprises a first groove at the second side of the substrate, a first electronic component over the first side of the substrate, and a resin in the first groove. The substrate comprises a floating pad at the first side of the substrate, a second groove at the first side of the substrate, and a third groove at the first side of the substrate, wherein the floating pad is between the second groove and the third groove. Other examples and related methods are also disclosed herein.

LEADFRAME BASED SEMICONDUCTOR PACKAGE WITH MULTIPLE DEVICES

A semiconductor package includes a plurality of leads, each lead having a planar portion and a non-planar portion, in which: the planar portion has a first side and a second side opposing the first side, and the non-planar portion is at an angle with the planar portion. The semiconductor package includes a first device mechanically coupled to the first side of the planar portion with first interconnects and a second device mechanically coupled to the second side of the planar portion with second interconnects. The semiconductor package includes mold compound covering the first device and the second device, in which: a first mold overlay is on a side of the first device distant from the leads, and a second mold overlay is on a side of the second device distant from to the leads.