Patent classifications
H10W72/01304
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
A semiconductor package includes a package substrate including an upper pad on an upper surface of the package substrate, a first chip structure including a plurality of first chips offset-stacked in a first direction, a controller chip on the package substrate and apart from the first chip structure in a horizontal direction, a chip connection bump between the package substrate and the controller chip, and an underfill material layer covering the chip connection bump, wherein a side surface of the underfill material layer is perpendicular to the package substrate.
Light emitting device for display and display apparatus
A light emitting display including a circuit board, a plurality of light emitting devices arranged on the circuit board each including a first, LED stack, a second LED stack, and a third LED stack, a bump pad disposed between the circuit board and the light emitting device, the bump pad comprising Au material, and an encapsulating layer comprising an optical interference preventing material and covering the light emitting devices, in which the circuit board includes an interconnection line and a plurality of pads disposed on an upper surface thereof to provide electrical connection, the first, second, and third LED stacks are stacked in a vertical direction, one of the LED stacks configured to emit light having the longest wavelength among the first, second, and third LED stacks is in ohmic contact with the Au material, and the bump pad has an irregular upper surface.
CHIP ON LEAD DEVICE AND MANUFACTURING METHOD
An electronic device includes a non-conductive die attach film on a side of a conductive lead, a semiconductor die having a first side and a lateral side, the first side on the non-conductive die attach film, and the lateral side including striations, and a package structure enclosing the semiconductor die and a portion of the conductive lead. A method includes singulating portions of a non-conductive die attach film on a carrier, attaching a backside of a wafer to the singulated portions of the non-conductive die attach film, and singulating semiconductor dies of the wafer while the backside of the wafer is attached to the singulated portions of the non-conductive die attach film.
Method for removing edge of substrate in semiconductor structure
A method for treating a semiconductor structure includes: forming the semiconductor structure which includes a carrier substrate, a device substrate, a semiconductor device formed on the device substrate, and a bonding layer formed to bond the semiconductor device with the carrier substrate, the device substrate having an upper surface which is faced upwardly, and which is opposite to the semiconductor device; and directing a chemical fluid to impinge the upper surface of the device substrate so as to remove an edge portion of the device substrate.
SUBSTRATES WITH SPACERS, INCLUDING SUBSTRATES WITH SOLDER RESIST SPACERS, AND ASSOCIATED DEVICES, SYSTEMS, AND METHODS
Substrates with spacers, including substrates with solder resist spacers, and associated devices, systems, and methods are disclosed herein. In one embodiment, a substrate comprises a first surface, a solder resist layer disposed over at least a portion of the first surface, and a plurality of electrical contacts at the first surface of the substrate. Electrical contacts of the plurality are configured to be coupled to corresponding electrical contacts at a surface of an electronic device. The substrate further includes a solder resist spacer disposed on the solder resist layer. The solder resist spacer can have a height corresponding to a thickness of the electronic device. The solder resist spacer can be configured as a dam to limit bleed out of underfill laterally away from the plurality of electrical contacts along the first surface and toward the solder resist spacer.