A method of making a semiconductor structure includes defining a first recess in an insulation layer. The method further includes forming a protection layer along a sidewall of the first recess. The method further includes forming a first conductive line in the first recess and in direct contact with the protection layer. The method further includes depositing a first insulation material over the first conductive line. The method further includes defining a second recess in the first insulation material. The method further includes forming a second conductive line in the second recess. The method further includes forming a via extending from the second conductive line, wherein the via directly contacts a sidewall of the protection layer.

A semiconductor device includes first and second conductive layers, a first epitaxial structure and a first via structure. The first conductive layer extends along a first direction, and provides a first reference voltage signal. The second conductive layer extends along the first direction, and is separated from the first conductive layer along a second direction. The first epitaxial structure is disposed between the first conductive layer and the second conductive layer, and has a first width along the first direction. The first via structure is disposed between the first conductive layer and the second conductive layer, and transmits the first reference voltage signal from the first conductive layer through the second conductive layer to the first epitaxial structure. The first via structure has a second width along the first direction. The second width is approximately equal to or larger than twice of the first width.

A semiconductor device includes a subtractive skip via technique in which a relatively high aspect ratio (HAR) skip via is fabricated within a lower aspect ratio (LAR) skip via opening. A metal fill is formed within the LAR skip via opening. Undesired portions of the metal fill region are removed, a retained portion or portion thereof forms the HAR skip via, and/or retained portions thereof forms multiple HAR skip vias, or the like. After forming these substrative via(s), a dielectric backfill may be formed therearound within the remaining LAR skip via opening. This backfill dielectric may be selected to reduce shorting propensities between the substrative via(s) and respective one or more wiring structures in a lower level, in a higher level, and/or the skipped level(s).