A semiconductor substrate is configured for dicing into separate die or individual semiconductor devices. The semiconductor substrate can comprise silicon, silicon carbide, or gallium nitride. A dicing grid bounds each semiconductor device on the semiconductor substrate. A die singulation process is configured to occur in the dicing grid. Material is coupled to the dicing grid. In one embodiment, the material can comprise carbon. A laser is configured to couple energy to the material coupled to the dicing grid. The energy from the laser heats the material. The heat from the material or the temperature differential between the material and the dicing creates a thermal shock that generates a vertical fracture in the semiconductor substrate that separates the semiconductor device from the remaining semiconductor substrate.

A planarization system is provided. The planarization system includes a first substrate chuck which holds the substrate during a planarization step, and a second substrate chuck which holds the substrate with a non-flat configuration during a separation step.

A method includes forming a first sealing layer at a first edge region of a first wafer; and bonding the first wafer to a second wafer to form a wafer stack. At a time after the bonding, the first sealing layer is between the first edge region of the first wafer and a second edge region of the second wafer, with the first edge region and the second edge region comprising bevels. An edge trimming process is then performed on the wafer stack. After the edge trimming process, the second edge region of the second wafer is at least partially removed, and a portion of the first sealing layer is left as a part of the wafer stack. An interconnect structure is formed as a part of the second wafer. The interconnect structure includes redistribution lines electrically connected to integrated circuit devices in the second wafer.

A semiconductor structure is provided. The semiconductor structure includes a substrate and a metallization structure over the substrate. The metallization structure includes a plurality of metal layers, a metal-ion-containing dielectric layer over at least one of the metal layers, and a conductive via laterally surrounded by the metal-ion-containing dielectric layer. A method of manufacturing a semiconductor structure is also provided.

A variety of footed and leadless semiconductor packages, with either exposed or isolated die pads, are described. Some of the packages have leads with highly coplanar feet that protrude from a plastic body, facilitating mounting the packages on printed circuit boards using wave-soldering techniques.

As an example, the present invention relates to a hybrid bonding method using an organic insulating layer as an insulating layer. In the hybrid bonding method using an organic insulating layer, there may be a difference in thermal expansion between a terminal electrode made of metal or the like and the organic insulating layer due to heating at the time of bonding, and it is necessary to provide a predetermined level difference D between a tip end surface of the terminal electrode and a surface of the organic insulating layer in advance. In the present invention, in order to provide the level difference D, the surface of the semiconductor substrate 100 is irradiated with plasma (e.g. argon plasma). In this plasma irradiation, an organic insulating layer 102 is etched with plasma such that a surface 102a of the organic insulating layer 102 of the semiconductor substrate 100 is on the farther side than a tip end surface 103a of an electrode 103.

Provided is a method of processing a substrate. The method includes supplying a treatment liquid containing oxygen atoms to a rotating substrate, and emitting, by a light source module, light to the substrate in a state where a liquid film formed by the supplied treatment liquid is in contact with the light source module to remove an organic material on the substrate.