Patent classifications
H10P72/0476
Semiconductor film plating perimeter mapping and compensation
Conditions at the perimeter of the wafer may be characterized and used to adjust current stolen by the weir thief electrodes during a plating process to generate more uniform film thicknesses. An electrode may be positioned in a plating chamber near the periphery of the wafer as the wafer rotates. To characterize the electrical contacts on the seal, a wafer with a seed layer may be loaded into the plating chamber, and a constant current may be driven through the electrode into the conductive layer on the wafer. As an electrical characteristic of this current varies, such as a voltage required to drive a constant current, a mapping characterizing the seal quality or the openings in the mask layer may be generated.
ETCHING OF SILICON CARBIDE FILMS FROM REACTOR PARTS
A method is provided for etching a silicon carbide accretion from one or more workpieces of a reaction chamber for the deposition of silicon carbide layers on a substrate. The method comprises the steps of: (I) providing a silicon carbide accretion on one or more workpieces of a reaction chamber of a reactor for deposition of silicon carbide; (II) executing at least one cycle of an etching process. Further provided is a reactor adapted to execute the method.