H10P72/19

Device for measuring physical property of wafer

A device is provided. The device is arranged in a wafer box and is configured to simulate to measure physical properties of a surface of a wafer in the wafer box during an air filling and exchanging operation on the wafer box when the wafer box is closed. The device includes one or more simulating members and one or more sensors. Each simulating members is arranged in one receiving groove. The physical properties of a surface of each simulating member received in the one receiving groove matches with the physical properties of the surface of the wafer received in the one receiving groove. At least one of the one or more sensors is arranged on a corresponding simulating member, each sensor is configured to measure the physical properties of a surface of a corresponding simulating member. A related wafer box is also provided.

SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

There is provided a technique that includes: a boat including plural slots to hold at least one substrate; a process furnace that processes the at least one substrate held in the boat; a boat elevator that raises and lowers the boat; a transfer device that transfers the at least one substrate between plural carriers where the at least one substrate is stored and the boat; and a controller capable of controlling the boat elevator and the transfer device, wherein the controller sets plural positions where the transfer device transfers the at least one substrate to the boat elevator, and select the positions to minimize a number of shifts among the positions of the boat elevator or total time taken during the shifts.

Cushioning material, packing body, and packing method
12570456 · 2026-03-10 · ·

There is provided a cushioning material, the cushioning material including a lower cushioning material that supports a lower portion of each of two rows of containers on a lower tier, middle cushioning materials that are interposed between the containers on an upper tier and the containers on the lower tier, and upper cushioning materials that are disposed in each of the two rows of the containers on the upper tier and that hold each of an upper portion of the containers on the upper tier, in which the lower cushioning material is formed without a space between the lower cushioning material and side plates of a packing case and the middle cushioning materials and the upper cushioning materials are formed with a predetermined space between the middle cushioning materials and the upper cushioning materials and the side plates of the packing case.

COVER FOR MODULE TRAY AND MODULE TRAY FOR SEMICONDUCTOR DEVICE INCLUDING THE SAME
20260090327 · 2026-03-26 ·

A cover for a module tray includes a cover structure to cover a case of a semiconductor device, and a card accommodation portion on an upper surface of the cover structure to accommodate a card. The card accommodation portion includes a first bracket having a first accommodation guide extending in the first horizontal direction, a second bracket spaced apart from the first bracket and having second and third accommodation guides, the second accommodation guide extending in the first horizontal direction to face the first accommodation guide, and the third accommodation guide extending in the second horizontal direction, and a third bracket spaced apart from the first and second brackets, and having fourth and fifth accommodation guides, the fourth accommodation guide extending in the first horizontal direction to face the first accommodation guide, and the fifth accommodation guide extending in the second horizontal direction to face the third accommodation guide.