Patent classifications
H10W20/4484
Silicon wafer and method for filling silicon via thereof
Disclosed are a silicon wafer and a method for filling a silicon via thereof, and belong to the field of superconducting quantum technologies. The method includes: obtaining a silicon wafer including at least one silicon via; providing a superconducting material on at least one side of the silicon wafer, the at least one side comprising a side where an opening of the silicon via is located; and heating and pressurizing the superconducting material to fill the superconducting material into the silicon via.
Superconducting device and method for manufacturing the same
To provide a superconducting device capable of more accurately arranging a non-contact coupling circuit of a superconducting integrated circuit chip and a non-contact coupling circuit of a circuit board. The chip has a first electrode made of a first superconducting material and a first non-contact coupling circuit on a surface thereof. The board has a second electrode made of a second superconducting material and a second non-contact coupling circuit on a surface thereof, and is arranged to face the chip. The second electrode has a protrusion protruding toward the chip. The protrusion includes a flat upper surface. The first electrode has a flat surface and a first recess. The first recess is arranged to face the upper surface to be located inside the upper surface of the protrusion. A third superconducting material connecting the upper surface and the first recess.
Electrical, mechanical, computing, and/or other devices formed of extremely low resistance materials
Electrical, mechanical, computing, and/or other devices that include components formed of extremely low resistance (ELR) materials, including, but not limited to, modified ELR materials, layered ELR materials, and new ELR materials, are described.