Microelectronic deviceshaving at least one conductive contact structure adjacent a silicide regionare formed using methods that avoid unintentional contact expansion and contact reduction. A first metal nitride liner is formed in a contact opening, and an exposed surface of a polysilicon structure is thereafter treated (e.g., cleaned and dried) in preparation for formation of a silicide region. During the pretreatments (e.g., cleaning and drying), neighboring dielectric material is protected by the presence of the metal nitride liner, inhibiting expansion of the contact opening. After forming the silicide region, a second metal nitride liner is formed on the silicide region before a conductive material is formed to fill the contact opening and form a conductive contact structure (e.g., a memory cell contact structure, a peripheral contact structure).

The present disclosure relates to semiconductor structures and, more particularly, to an extended drain metal oxide semiconductor device and methods of manufacture. The structure includes: a gate structure including a gate dielectric material and a gate electrode with a stepped feature; sidewall spacers on sidewalls of the gate electrode, the sidewall spacers including a notched feature adjacent to the gate electrode; and a silicide contact on a surface of the gate electrode, the silicide contact being free of breaks on the surface of the gate electrode.

A semiconductor structure having a high-temperature silicide contact for backside source/drain (S/D) contacts and method for making the same is disclosed. In an aspect, the semiconductor structure comprises a substrate; a source/drain (S/D) structure comprising a lower S/D portion disposed above the substrate and an upper S/D portion disposed above the lower S/D portion, the lower S/D portion comprising a high temperature silicide structure and an etch stop material structure surrounding at least a portion of the high temperature silicide structure, the upper S/D portion comprising an epitaxial (EPI) material in contact with the high temperature silicide structure; and a backside metal structure that extends through the substrate and is in contact with the high temperature silicide structure.

An integrated circuit includes a metal-oxide semiconductor field-effect transistor (MOSFET) formed in and over a semiconductor substrate. The MOSFET has a gate structure that includes a gate dielectric layer formed the substrate and a gate electrode located over the gate dielectric layer. A pre-metal dielectric layer is over the gate electrode layer, and an electrical contact through the pre-metal dielectric layer connects to the gate electrode. The polysilicon layer has a mean grain size of 50 nanometers (nm) or less.