A package and method is disclosed. In one example, the package comprises a component assembly section, at least one electronic component being assembled with the component assembly section, at least one lead section being electrically coupled with the at least one electronic component and/or with the component assembly section, an encapsulant at least partially encapsulating the at least one electronic component and partially encapsulating the component assembly section and the at least one lead section so that part of the component assembly section and part of the at least one lead section are exposed beyond the encapsulant. A thermoplastic structure covers an exposed area of the component assembly section without covering an exposed area of the at least one lead section.

In examples, a semiconductor package comprises a semiconductor die having a device side including circuitry and a non-device side opposing the device side. The semiconductor package comprises a polyimide substrate coupled to the non-device side of the semiconductor die by an adhesive layer. The semiconductor package comprises a conductive terminal coupled to the polyimide substrate by the adhesive layer, and a bond wire coupled to the device side of the semiconductor die and to the conductive terminal. The semiconductor package comprises a mold compound covering the semiconductor die, the polyimide substrate, the bond wire, and at least part of the conductive terminal, with the conductive terminal extending to an exterior of the mold compound.

A package includes a first direct bonded metal (DBM) substrate, a first semiconductor die disposed on a top surface of the first DBM substrate, a second DBM substrate disposed at a height above the first DBM substrate, and a second semiconductor die disposed on a top surface of the second DBM substrate. A wire bond is made between the first semiconductor die disposed on the top surface of the first DBM substrate and the second semiconductor die disposed on the top surface of the second DBM substrate.

An electronic device package includes a frame, an electronic device mounted to the frame, surface-mount leads, and a gel at least partially filling a cavity between the electronic device and the frame. The electronic device includes electronic circuitry provided on an electronic device substrate, and the surface-mount leads are electrically connected to the electronic circuitry and extend laterally and outwardly from an outer perimeter of the frame. The gel in the cavity covers the electronic circuitry.

An insulated metal substrate (1) for a power semiconductor device is specified, comprising a metal base (2), a dielectric layer (3) arranged on the metal base (2), an electrically conductive layer (4) arranged on the dielectric layer (3), and a reinforcement structure (5), wherein the reinforcement structure (5) is arranged in a peripheral region of the insulated metal substrate (1) at least partially surrounding a central region of the insulated metal substrate (1). Furthermore, a method for producing an insulated metal substrate is specified.