A semiconductor apparatus, including: a conductive pattern; and a terminal that includes a bonding portion that has a rear surface bonded to the conductive pattern, a rising portion extending upward from the bonding portion, and a joining portion that joins the bonding portion and the rising portion without being bonded to the conductive pattern. The bonding portion has, on a front surface thereof, a plurality of rows of indentations, the indentations in each row being aligned in a first direction up to a boundary between the bonding portion and the joining portion. Each indentation has a recess. Any two of the recesses that are adjacent in a second direction perpendicular to the first direction are disposed at positions that are displaced from each other in the first direction. Each recess has a deepest point. The deepest points of the recesses are positioned away from the boundary.

A semiconductor device includes: an insulating substrate including a circuit pattern; a semiconductor chip mounted on the insulating substrate and connected to the circuit pattern; and an overcurrent interruption mechanism constituted with a same material as material of the circuit pattern, connected to the circuit pattern in series, wherein when an overcurrent flows, the overcurrent interruption mechanism melts and is cut.

The present disclosure relates to a power semiconductor module including: a carrier; a plurality of semiconductor dies mounted onto the carrier; a housing including a frame enclosing the carrier circumferentially; a first external connection electrically connected to a first subset of the semiconductor dies, the first external connection protruding laterally from the housing at a first level; and an insert including an electrically isolating material and a second external connection mounted onto the electrically isolating material. The insert is at least partially mounted to the frame and at least partially covers the carrier and/or the first subset of the plurality of semiconductor dies. The second external connection is connected to a second subset of the plurality of semiconductor dies. The second external connection protrudes from the housing.