Patent classifications
H10W72/01357
Semiconductor device
A semiconductor device includes a semiconductor element having a surface on which a first electrode and a second electrode are disposed, a conductor plate having a surface facing the surface of the semiconductor element and electrically connected to the first electrode, an insulating layer disposed on the surface of the conductor plate and covers a part of the surface of the conductor plate, and a conductor circuit pattern disposed on the insulating layer. The conductor circuit pattern has at least one conductor line electrically connected to the semiconductor element. The at least one conductor line includes a conductor line electrically connected to the second electrode.
ELECTRONIC DEVICE HAVING A SUBSTRATE EMPLOYING REDUCED AREA, ADDED METAL PAD(S) TO METAL INTERCONNECT(S) TO REDUCE AIR VOIDS IN SOLDER JOINTS
An electronic device having a substrate employing reduced area, added metal pad(s) to a metal interconnect(s) to reduce air voids in a solder joint and related fabrication methods are disclosed. The electronic device includes a die that has die interconnects coupled to a first metal pad(s) of a respective metal interconnect(s) of a metallization layer of the substrate through a second, additional metal pad(s). To facilitate a reduction in air voids in the solder joint between the die and the first metal pad(s) and consequently the amount of solder between the first metal pad and the die, the second, additional metal pad(s) having a reduced cross-sectional area from the first metal pad(s) is above and adjacent to the first metal pad(s). A solder joint(s) is employed to couple the second, additional metal pad(s) to a die interconnect(s) of the die to couple the die to the substrate.