Semiconductor module including a semiconductor and including a shaped metal body that is electrically contacted by the semiconductor, for forming a contact surface for an electrical conductor, wherein the shaped metal body is bent or folded. A method is also described for establishing electrical contacting of an electrical conductor on a semiconductor, said method including the steps of: fastening a bent or folded shaped metal body of a constant thickness to the semiconductor by means of a first fastening method and then fastening the electrical conductor to the shaped metal body by means of a second fastening method.

The present invention provides a chip packaging structure and a chip packaging method. The chip packaging structure includes a substrate, a metal bonding pad disposed on the substrate and a metal wire, wherein the tail end of the metal wire is provided with a welding part, the welding part is welded to the metal bonding pad, the metal bonding pad is provided with a coating layer, and at least part of the welding part is located between the coating layer and the metal bonding pad. The present invention greatly improves a welding effect of the metal wire and the metal bonding pad, so that the welding of the metal wire and the metal bonding pad is more reliable and stable.

A chip package structure and a method for producing the same are provided. The method at least includes: providing a substrate; forming a mirror ink on the substrate; placing a chip upside-down on the substrate; forming soldering wires coupled with the chip and the substrate; forming a support body on the substrate; providing a package cover adhered to a top surface of the support body; performing a solidifying process in which a solidifying light beam is emitted to the mirror ink and the mirror ink reflects the solidifying light beam to the support body to solidify the support body; performing a packaging process in which a package layer is formed to cover the chip, an outer periphery of the support body, and the package cover; and performing a cutting process in which the package layer and the substrate are cut to form the chip package structure.