MEMS switches and methods of manufacturing MEMS switches is provided. The MEMS switch having at least two cantilevered electrodes having ends which overlap and which are structured and operable to contact one another upon an application of a voltage by at least one fixed electrode.

An approach includes a method of fabricating a switch. The approach includes forming a first cantilevered electrode over a first fixed electrode, forming a second cantilevered electrode with an end that overlaps the first cantilevered electrode, forming a third cantilevered electrode operable to directly contact the first cantilevered electrode upon an application of a voltage to a second fixed electrode, and forming a hermetically sealed volume encapsulating the first fixed electrode, the second fixed electrode, the first cantilevered electrode, and the second cantilevered electrode.

An approach includes a method of fabricating a switch. The approach includes forming a first cantilevered electrode operable to directly contact a second fixed electrode upon an application of a voltage to a first fixed electrode, forming a second cantilevered electrode with an end that overlaps the first cantilevered electrode, and forming a hermetically sealed volume encapsulating the first fixed electrode, the second fixed electrode, the first cantilevered electrode, and the second cantilevered electrode.

In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.

A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

A method for manufacturing a millimeter scale electromechanical device includes coupling a stainless steel ply to a polymer carrier ply, coating the stainless steel ply in a photo resist material, masking the photoresist material, exposing the photoresist material to cure a portion of the photoresist material, developing the photoresist material to remove uncured photoresist material from the stainless steel ply, chemically etching the stainless steel ply to remove a patterned portion of the stainless steel ply, dissolving the polymer carrier ply to release unwanted chips of the stainless steel ply, and adhering the patterned stainless steel ply to a flexible material ply to form a sub-laminate.

A method for performing atomic layer etching (ALE) on a substrate, including the following method operations: performing a surface modification operation on a surface of the substrate, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer; performing a removal operation on the substrate surface, to remove the modified layer from the substrate surface, wherein removing the modified layer includes exposing the substrate surface to a metal complex, such that a ligand exchange reaction occurs between the metal complex and converted species of the modified layer; performing, following the removal operation, a plasma treatment on the substrate surface, the plasma treatment configured to remove residues formed from the exposure of the substrate surface to the metal complex, wherein the residues are volatilized by the plasma treatment; repeating the foregoing operations until a predefined thickness has been etched from the substrate surface.

A method for performing atomic layer etching (ALE) on a substrate, including the following method operations: performing a surface modification operation on a surface of the substrate, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer; performing a removal operation on the substrate surface, the removal operation configured to remove the modified layer from the substrate surface, wherein removing the modified layer occurs via a ligand exchange reaction that is configured to volatilize the modified layer; performing, following the removal operation, a plasma treatment on the substrate surface, the plasma treatment configured to remove residues generated by the removal operation from the substrate surface, wherein the residues are volatilized by the plasma treatment; repeating the foregoing operations until a predefined thickness has been etched from the substrate surface.