Patent classifications
B81C2201/0142
Microfabrication of omni-view peripheral scanning system
Embodiments of the disclosure provide methods for microfabricating an omni-view peripheral scanning system. One exemplary method may include separately fabricating a reflector and a scanning MEMS mirror, and then bonding the microfabricated reflector with the scanning MEMS mirror to form the omni-view peripheral scanning system. The microfabricated reflector may include a cone-shaped bottom portion, and a via hole across the cone-shaped bottom portion. The microfabricated scanning MEMS mirror may include a MEMS actuation platform and a scanning mirror supported by the MEMS actuation platform. The scanning MEMS mirror may face the cone-shaped bottom portion of the reflector when forming the omni-view peripheral scanning system.
Method of production of semiconductor device having semiconductor layer and support substrate spaced apart by recess
A semiconductor device production method includes performing trench etching to form a trench in a thickness direction of a semiconductor layer so that both of a first pattern portion and a second pattern portion whose side walls face each other across the trench are formed. In the trench etching, the semiconductor layer is etched and removed while a protective film is formed on a surface of the semiconductor layer, and the trench etching is performed so that the first pattern portion and the second pattern portion are configured to have a same potential or a same temperature during the trench etching.
MICRO ELECTRO MECHANICAL SYSTEM PROBE AND MANUFACTURING METHOD THEREOF
A MEMS probe and manufacturing method thereof are provided. The method is mainly to form connected first-level, second-level, and third-level pin grooves on both sides of the silicon substrate through an etching process, followed by two electroplating processes to deposit nickel-cobalt-phosphorus alloy in the first-level pin groove to form the tip of the microprobe, and to deposit nickel-cobalt alloy in the second-level pin groove and the third-level pin to form the pin head and pin arm, thereby forming a three-level microprobe. A circuit substrate made of ceramic material is disposed with at least one window, the surface of the circuit substrate adjacent to the window is provided with a plurality of circuit pads, and the circuit substrate is abutted to the pin arm of the microprobe. The silicon substrate is then removed, to form a plurality of cantilever microprobes made of nickel-cobalt-phosphorus alloy and nickel-cobalt alloy on the circuit substrate.
ATOMIC LAYER ETCHING USING A COMBINATION OF PLASMA AND VAPOR TREATMENTS
A method for performing atomic layer etching (ALE) on a substrate, including the following method operations: performing a surface modification operation on a surface of the substrate, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer; performing a removal operation on the substrate surface, to remove the modified layer from the substrate surface, wherein removing the modified layer includes exposing the substrate surface to a metal complex, such that a ligand exchange reaction occurs between the metal complex and converted species of the modified layer; performing, following the removal operation, a plasma treatment on the substrate surface, the plasma treatment configured to remove residues formed from the exposure of the substrate surface to the metal complex, wherein the residues are volatilized by the plasma treatment; repeating the foregoing operations until a predefined thickness has been etched from the substrate surface.
SEMICONDUCTOR CHIP WITH EMBEDDED MICROFLUIDIC CHANNELS AND METHOD OF FABRICATING THE SAME
A semiconductor chip with embedded microfluidic channels includes a semiconductor substrate, a circuit structure layer, a first microfluidic channel and a micro via hole. The circuit structure layer includes a first metal layer, a first insulation layer and a second metal layer sequentially disposed on a substrate surface of the semiconductor substrate along a stacking direction. A plurality of first bridge patterns penetrates the first insulation layer, and are each electrically connected to the first metal layer and/or the second metal layer. The first microfluidic channel and the micro via hole are embedded in the circuit structure layer. In the stacking direction, a first height of the first microfluidic channel is equal to a first thickness of the first metal layer. In any direction parallel to the substrate surface, a hole width of the micro via hole is equal to a pattern width of each of the first bridge patterns.
Atomic layer etching of AL2O3 using a combination of plasma and vapor treatments
A method for performing atomic layer etching (ALE) on a substrate, including the following method operations: performing a surface modification operation on a surface of the substrate, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer; performing a removal operation on the substrate surface, the removal operation configured to remove the modified layer from the substrate surface, wherein removing the modified layer occurs via a ligand exchange reaction that is configured to volatilize the modified layer; performing, following the removal operation, a plasma treatment on the substrate surface, the plasma treatment configured to remove residues generated by the removal operation from the substrate surface, wherein the residues are volatilized by the plasma treatment; repeating the foregoing operations until a predefined thickness has been etched from the substrate surface.
SEMICONDUCTOR DEVICE PRODUCTION METHOD
A semiconductor device production method includes performing trench etching to form a trench in a thickness direction of a semiconductor layer so that both of a first pattern portion and a second pattern portion whose side walls face each other across the trench are formed. In the trench etching, the semiconductor layer is etched and removed while a protective film is formed on a surface of the semiconductor layer, and the trench etching is performed so that the first pattern portion and the second pattern portion are configured to have a same potential or a same temperature during the trench etching.
METHOD FOR RECESS ETCHING IN MICROMECHANICAL DEVICES
The disclosure relates to a method for manufacturing recessed micromechanical structures in a MEMS device wafer. First vertical trenches in the device wafer define the horizontal dimensions of both level and recessed structures. The horizontal face of the device wafer and the vertical sidewalls of the first vertical trenches are then covered with a self-supporting etching mask which is made of a self-supporting mask material, which is sufficiently rigid to remain standing vertically in the location where it was deposited even as the sidewall upon which it was deposited is etched away. Recess trenches are then etched under the protection of the self-supporting mask. The method allows a spike-preventing aggressive etch to be used for forming the recess trenches, without harming the sidewalls in the first vertical trenches.
FORMING A MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICE USING SILICON-ON-NOTHING AND EPITAXY
A method for forming a microelectromechanical systems (MEMS) device may include performing a first silicon-on-nothing process to form a first cavity in a substrate. The method may include depositing an epitaxial layer on a surface of the substrate. The method may include performing a second silicon-on-nothing process to form a second cavity in the epitaxial layer. The method may include exposing the first cavity and the second cavity by removing a portion of the substrate and the epitaxial layer.
METHOD OF FORMING AN ON-PITCH SELF-ALIGNED HARD MASK FOR CONTACT TO A TUNNEL JUNCTION USING ION BEAM ETCHING
A method of forming a memory device that in one embodiment may include forming a magnetic tunnel junction on a first electrode using an electrically conductive mask and subtractive etch method. Following formation of the magnetic tunnel junction, at least one dielectric layer is deposited to encapsulate the magnetic tunnel junction. Ion beam etching/Ion beam milling may then remove the portion of the at least one dielectric layer that is present on the electrically conductive mask, wherein a remaining portion of the at least one dielectric layer is present over the first electrode. A second electrode may then be formed in contact with the electrically conductive mask.