A liquid ejecting apparatus includes a drive circuit that outputs a drive signal, wherein the drive circuit includes a modulation circuit that modulates a base drive signal to output a modulation signal, an amplifier circuit that amplifies the modulation signal to output an amplified modulation signal, a demodulation circuit that demodulates the amplified modulation signal to output the drive signal, and a substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided, wherein the substrate includes a first face and a second face opposite to the first face, wherein the demodulation circuit includes a first coil and a second coil electrically coupled in parallel with the first coil, and wherein the first coil is positioned so as to overlap at least part of the second coil in a direction normal to the first face.

A print head drive circuit that drives a print head including an ejection portion having a piezoelectric element and a changeover switch, with a selection signal including a first information block and a second information block for selecting whether or not to drive the piezoelectric element, and a switching timing signal for changing a logic level to control a switching timing of the changeover switch, outputs the first information block in which a logic level of the selection signal changes without changing a logic level of the switching timing signal in a first period, changes the logic level of the switching timing signal, and does not change the logic level of the selection signal in a second period, and outputs the second information block in which the logic level of the selection signal changes without changing the logic level of the switching timing signal in a third period.

An example input voltage agnostic fluidic device may include a level shifter to adjust an input voltage of control signals received at an input interconnect to a voltage level that is within operational thresholds of on-chip devices of the input voltage agnostic fluidic device. A clamp circuit may be provided to clamp circuitry downstream of the level shifter below the operational threshold of the on-chip device.

A head unit includes a liquid discharge head, circuitry, and a cable. The liquid discharge head includes multiple piezoelectric elements including multiple individual electrodes and a common electrode. The circuitry generates a first drive signal applied to the multiple individual electrodes, a second drive signal applied to the multiple individual electrodes and having a different waveform from the first drive signal, and a voltage signal applied to the common electrode. The cable connects the liquid discharge head and the circuitry. The cable includes n first wires through which the first drive signal is transmitted, n second wires through which the second drive signal is transmitted, and n third wires through which the voltage signal is transmitted. Here, n is an integer equal to or greater than 2. Each of at least (n−1) third wires is arranged between one of the n first wires and one of the n second wires.

A print element substrate comprises print elements generating thermal energy for ejecting liquid; and a temperature detection element circuit including temperature detection elements provided corresponding to each of the print elements, and reading temperature information by selectively energizing one of the temperature detection elements, wherein the temperature detection element circuit includes: a signal processing portion outputting a selection signal having a second voltage amplitude larger than a first voltage amplitude, based on an input signal having the first voltage amplitude; a selection switch provided for each of the plurality of temperature detection elements, selecting the temperature detection element; and a first read switch provided for each of the plurality of temperature detection elements, reading a voltage of a terminal of one of the temperature detection element selected by the selection switch, and wherein the selection switch and the first read switch are driven by using the selection signal.

The present subject matter relates to disposing memory banks and select register. In an example implementation, a plurality of memory banks is arranged to form a group of memory banks. Each memory bank includes a plurality of memory units. At least one select register generates a select signal to access the memory units in the plurality of memory banks. The at least one select register is disposed at an end of the group of memory banks.

A liquid discharge head includes a plurality of discharge elements, a plurality of driving elements, a plurality of control circuits, a first ground wiring and a first power supply wiring configured to supply power to the plurality of discharge elements and the plurality of driving elements, and a second ground wiring and a second power supply wiring configured to supply power to the plurality of control circuits. The first ground wiring and the first power supply wiring include, in a first conductive layer of a plurality of conductive layers, a first wiring group extending in a first direction, and in a second conductive layer, a second wiring group extending in a second direction which intersects with the first direction. The second power supply wiring is arranged on one of the first conductive layer and the second conductive layer.

In one example in accordance with the present disclosure, a fluidic die is described. The fluidic die includes an array of fluid actuators grouped into primitives. The fluidic die also includes a fluid actuator controller to selectively activate fluid actuators via activation data. The fluidic die also includes an array of actuator evaluators, wherein each actuator evaluator of the fluidic die is coupled to a subset of the array of fluid actuators. The actuator evaluators selectively evaluate an actuator characteristic of a selected fluid actuator based on: an output of an actuator sensor paired with the selected fluid actuator, the activation data, and an evaluation control signal.

A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signals paths which communicate operating signals to the print component, and a memory component to store memory values associated with the print component. A control circuit to, in response to identifying a sequence of operating signals representing a memory read, provide a first analog signal on the analog pad in parallel with a second analog signal from the print component to provide an analog electrical value on the analog pad representing stored memory values selected by the memory read.

In some examples, a fluid dispensing device component includes a plurality of fluidic dies each comprising a memory, a plurality of control inputs to provide respective control information to respective fluidic dies of the plurality of fluidic dies, and a data bus connected to the plurality of fluidic dies, the data bus to provide data of the memories of the plurality of fluidic dies to an output of the fluid dispensing device component.