A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit to transmit, via the interface, a limit parameter and a count threshold parameter. The logic circuit is to receive, via the interface, initial requests to read sensor IDs with the component connected to the apparatus and the apparatus not pneumatically actuating the component. The logic circuit is to transmit, via the interface, a resting state digital value in response to each initial request. The logic circuit is to receive, via the interface, further requests to read the sensor IDs with the component connected to the apparatus and the apparatus pneumatically actuating the component. The logic circuit is to transmit, via the interface, a further digital value in response to each further request.

A replaceable print apparatus component includes a print material reservoir, a print material within the reservoir and a sensing system including an integrated circuit configured to connect to and communicate over a digital bus. The sensing system includes at least one sensor, a digital controller, an analog to digital converter electrically coupled to the digital controller, and a memory array electrically coupled to the digital controller. The digital controller is configured to generate a clock signal for timing operations of the integrated circuit. The operations include initiating the at least one sensor based on values stored in the memory array and generating outputs of the at least one sensor via the analog to digital converter.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit includes a memory storing at least one temperature calculation parameter. The at least one logic circuit is configured to receive, via the interface, a first request to read the at least one temperature calculation parameter; and transmit, via the interface, the at least one temperature calculation parameter in response to the first request. The at least one logic circuit is configured to receive, via the interface, a second request corresponding to a sensor ID; and transmit, via the interface, a digital value in response to the second request. The digital value adjusted based on the at least one temperature calculation parameter corresponds to an absolute temperature of the print apparatus component.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit, and at least one logic circuit to receive, via the interface, requests corresponding to different sensor IDs with the component connected to the apparatus. The logic circuit is to transmit, via the interface, a digital value in response to each request. The digital values corresponding to the different sensor IDs are distinct.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit is configured to receive, via the interface, a request and a reference clock signal. The at least one logic circuit is configured to transmit, via the interface, a digital value indicating a count in response to the request and the reference clock signal. The digital value varies based on the reference clock signal.

An integrated circuit to drive a plurality of fluid actuation devices includes an interface, a digital circuit, an analog circuit, and control logic. The digital circuit outputs a digital signal to the interface. The analog circuit outputs an analog signal to the interface. The control logic activates the digital circuit or the analog circuit.

A fluid ejection controller interface includes input logic to receive control data packets and a first clock signal, each control data packet including a set of primitive data bits and a set of random bits, wherein the input logic identifies the random bits in the received control data packets to facilitate the creation of modified control data packets. The fluid ejection controller interface includes a clock signal generator to generate a second clock signal that is different than the first clock signal, and output logic to receive the modified control data packets, and output the modified control data packets to a fluid ejection controller of a fluid ejection device based on the second clock signal.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit is configured to receive, via the interface, a request to replace an internal clock signal from an internal clock generator of the logic circuitry package with an external test clock signal. The at least one logic circuit is configured to receive, via the interface, the external test clock signal. The at least one logic circuit is configured to replace the internal clock signal with the external test clock signal in the logic circuitry package.

A logic circuitry package for a replaceable print apparatus component comprises at least one logic circuit and an interface to communicate with a print apparatus logic circuit. The at least one logic circuit is configured to receive, via the interface, calibration parameters including an offset parameter and a sensor ID. The at least one logic circuit is configured to output, via the interface, a digital value corresponding to the sensor ID and offset based on the offset parameter.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit is configured to receive, via the interface, a request and a reference clock signal. The at least one logic circuit is configured to transmit, via the interface, a digital value indicating a count in response to the request and the reference clock signal. The digital value varies based on the reference clock signal.