A logic circuitry package includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The logic circuit is configured to receive, via the interface, a plurality of first requests in a heater disabled mode, each first request corresponding to a different sensor ID of a plurality of sensor IDs; transmit, via the interface, a first digital value in response to each first request; receive, via the interface, a plurality of second requests in a heater enabled mode, each second request corresponding to a different sensor ID of the plurality of sensor IDs; and transmit, via the interface, a second digital value in response to each second request. Delta values corresponding to a difference between the first digital value and the second digital value for each different sensor ID of the plurality of sensor IDs are indicative of a print material level.

A replaceable print apparatus component includes a print material reservoir, a print material within the reservoir and a sensing system including an integrated circuit configured to connect to and communicate over a digital bus. The sensing system includes at least one sensor, a digital controller, an analog to digital converter electrically coupled to the digital controller, and a memory array electrically coupled to the digital controller. The digital controller is configured to generate a clock signal for timing operations of the integrated circuit. The operations include initiating the at least one sensor based on values stored in the memory array and generating outputs of the at least one sensor via the analog to digital converter.

A logic circuitry package for a replaceable print apparatus component includes an I2C interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit is configured to respond to communications over the I2C interface that are directed to an initial or reconfigured I2C address. The at least one logic circuit is configured to receive, via the I2C interface, a write command to a first memory address of the logic circuit to initiate a first function of the logic circuit. The at least one logic circuit is configured to generate first data in response to the first function. The at least one logic circuit is configured to receive, via the I2C interface, a first read command to a second memory address of the logic circuit. The at least one logic circuit is configured to transmit, via the I2C interface, the first data in response to the first read command to the second memory address.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit is configured to receive, via the interface, a request to turn on a clock generator of the logic circuitry package. The at least one logic circuit is configured to receive, via the interface, a request selecting an internal clock signal to sample. The at least one logic circuit is configured to receive, via the interface, a reference clock signal. The at least one logic circuit is configured to transmit, via the interface, a digital value indicating a count of cycles of the selected internal clock signal during a predetermined number of cycles of the reference clock signal.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit including a memory storing a reference parameter. The at least one logic circuit is configured to receive, via the interface, a first request sent to a first address to read the reference parameter; and transmit, via the interface, the reference parameter in response to the first request. The at least one logic circuit is configured to receive, via the interface, a second request sent to a second address to implement a task; and implement the task to output a digital value via the interface in response to the second request. The reference parameter corresponds to the digital value.

An integrated circuit includes thermal tracking logic, control logic, and an output interface. The thermal tracking logic determines a temperature of a fluid ejection die. The control logic defines an emulated parameter of the fluid ejection die as a function of the temperature of the fluid ejection die. The output interface outputs the emulated parameter to a printer system based on the function and the temperature of the fluid ejection die.

There is disclosed a controller for controlling two or more groups of nozzles in an array, the controller configured to: encode data blocks into a data stream, wherein each data block denotes how a respective group of nozzles is to be controlled for a droplet period; encode fire codes into the data stream, wherein each fire code is a reserved code that denotes when a respective group of nozzles is to be controlled in accordance with the data block for the droplet period; and wherein the data block precedes the fire code for the respective group of nozzles in the data stream and wherein the fire codes are generated independently of the data blocks.

In one example in accordance with the present disclosure, a fluidic die is described. The fluidic die includes an array of fluid actuators. Wires are disposed at various points along at least one of a supply bus and a return bus that are coupled to the actuators in the array. The wires output a voltage level at a corresponding point of the respective bus. At least one comparator compares a voltage of a selected wire against a voltage threshold. At least one fault capture device to output a signal indicating a fault based on the output of the at least one comparator.

A print head includes ejecting portions ejecting liquid by being supplied with a high voltage signal, a switch group switching between whether or not to supply the high voltage signal to the first ejecting portion group in accordance with a low voltage logic signal, a memory, a high voltage signal input terminal, and a low voltage logic signal input terminal, the print head having a first mode in which the print head executes reading processing of reading information stored in the memory and does not execute ejection control processing of controlling whether or not to supply the high voltage signal to the first ejecting portion group by switching the switch group in accordance with an input signal input from the low voltage logic signal input terminal and a second mode in which the print head does not execute the reading processing and executes the ejection control processing.

In some examples, a system includes a plurality of fluid ejection devices, a fluid ejection controller, and a plurality of data lines shared by the plurality of fluid ejection devices and connected between the fluid ejection controller and the plurality of fluid ejection devices. A first data line of the plurality of data lines communicates data of a first memory of a first fluid ejection device of the plurality of fluid ejection devices, and a second data line of the plurality of data lines communicates data of a second memory of the first fluid ejection device.