A liquid ejecting head control circuit controls a liquid ejecting head and a switching circuit. The liquid ejecting head control circuit includes a drive signal output circuit, and a switching control circuit. The switching control circuit outputs an ejection control signal defining an amount of a liquid to be ejected from a nozzle, a switching timing signal defining switching timing of the switching circuit, and a state selection signal defining a state of the switching circuit in a control period defined by the switching timing signal. The state selection signal for a first time period for which the liquid ejecting head is controlled so as to eject the liquid from the nozzle is different from the state selection signal for a second time period for which the liquid ejecting head is controlled so as not to eject the liquid from the nozzle.

There is provided print apparatus including: piezoelectric member; individual electrode; first and second common electrodes; voltage application circuit; detection circuit configured to detect a capacitance of a first capacitor configured by the piezoelectric member, the individual electrode, and the first common electrode and a second capacitor configured by the piezoelectric member, the individual electrode, and the second common electrode; first switching element; and control circuit. The control circuit is configured to execute; a first voltage application process to apply a first voltage to the second common electrode in order to discharge the ink; a detection process to detect the capacitance after electrically connecting the piezoelectric member and the detection circuit with the first switching element; and a second voltage application process to apply a second voltage to the second common electrode before the detection process, the second voltage being lower than the first voltage.

A driving device includes a piezoelectric element, a driving electrode, a first switch that performs switching whether to electrically couple the first wire to the driving electrode, a detection circuit that detects, via a second wire, a vibration produced in the piezoelectric element, a second switch that performs switching whether to electrically couple the second wire to the driving electrode, and a determination circuit that determines a state of the piezoelectric element. The second switch remains off during a first period, remains on during a second period subsequent to the first period, remains off during a third period subsequent to the second period, and remains on during a fourth period subsequent to the third period. The determination circuit determines a state of the piezoelectric element, based on a detection result of the detection circuit in at least part of the fourth period.

In some examples, a circuit for use with a memory element and a nozzle for outputting fluid, includes a data line, a fire line, and a selector responsive to the data line to select the memory element or the nozzle. The selector is to select the memory element responsive to the data line having a first value, and to select the nozzle responsive to the data line having a second value different from the first value. The fire line is to control activation of the nozzle in response to the nozzle being selected by the selector, and to communicate data of the memory element in response to the memory element being selected by the selector.

A level shift circuit that outputs a level shift amplification modulation signal obtained by shifting a potential of an amplification modulation signal output by an amplifier circuit is provided, a potential of a first voltage supplied to one end of a first transistor of the amplifier circuit is larger than a potential of a second voltage supplied to a bootstrap circuit which is a reference of a third voltage supplied to one end of a third transistor included in the level shift circuit, and a second gate driver included in the level shift circuit outputs a third gate signal that switches an operation of the third transistor and a fourth gate signal that switches an operation of a fourth transistor, in a period during which a potential of a drive signal is between the potential of the first voltage and the potential of the second voltage.

There is provided a head unit including: a substrate on which a first driving circuit is disposed; a heat sink fixed to the substrate; and heat conductive elastic bodies positioned between the substrate and the heat sink, in which the first driving circuit includes a first integrated circuit, a first amplifier circuit including a first transistor, and a first smoothing circuit that outputs the first driving signal, in which a first heat conductive elastic body is in contact with the heat sink and the first integrated circuit, a second heat conductive elastic body is in contact with the heat sink and the first transistor, and the first heat conductive elastic body and the second heat conductive elastic body are in a form of a gel having flame retardancy and electric insulation property.

There are provided a substrate on which a first integrated circuit, a first transistor, a second integrated circuit, and a second transistor are disposed; a heat sink fixed to the substrate; a first heat conductive elastic body which is in contact with the heat sink and the first integrated circuit; a second heat conductive elastic body which is in contact with the heat sink and the first transistor; a third heat conductive elastic body which is in contact with the heat sink and the second integrated circuit; and a fourth heat conductive elastic body which is in contact with the heat sink and the second transistor, the heat sink has a first recess portion positioned between the first heat conductive elastic body and the second heat conductive elastic body, and a second recess portion positioned between the third heat conductive elastic body and the fourth heat conductive elastic body.

A first switching circuit, a second switching circuit, a first bootstrap circuit that is coupled to the first switching circuit and the second switching circuit, and a smoothing circuit and outputs a drive signal are provided, in which the second switching circuit includes a second gate driver that outputs a third gate signal and a fourth gate signal, a third transistor of which the first voltage is supplied, and which is driven based on the third gate signal, a fourth transistor which is driven based on the fourth gate signal, and a second bootstrap circuit that includes a second capacitive element supplying a third voltage to the second gate driver and coupled to a second output point and the second gate driver, and a second diode of which the first voltage is supplied and which is coupled to the second capacitive element.

There are provided a substrate on which a first integrated circuit, a first transistor, a second integrated circuit, and a second transistor are disposed; a heat sink fixed to the substrate; the substrate has a first fixing reference hole and a second fixing reference hole, the heat sink has a first fixing reference pin and a second fixing reference pin which are inserted into the first fixing reference hole and the second fixing reference hole, and the first integrated circuit, the second integrated circuit, the first transistor, and the second transistor are positioned between the first fixing reference hole and the second fixing reference hole.

A level shift circuit and when a reference potential of the amplification modulation signal is transitioned from a first potential to a second potential having a high potential, a second gate driver performs a first control that outputs a third gate signal controlling a third transistor to be non-conductive and a fourth gate signal controlling a fourth transistor to be conductive, and then outputs the third gate signal controlling the third transistor to be conductive and the fourth gate signal controlling the fourth transistor to be non-conductive, and a second control that outputs the third gate signal controlling the third transistor to be non-conductive and the fourth gate signal controlling the fourth transistor to be conductive after the first control, and then outputs the third gate signal controlling the third transistor to be conductive and the fourth gate signal controlling the fourth transistor to be non-conductive.