An integrated circuit to drive a plurality of fluid actuation devices includes an ID line, a fire line, a discharge path, a memory element, and a latch. The memory element is electrically coupled to the fire line and the discharge path. The latch disables the discharge path in response to a first logic level on the ID line and enables the discharge path in response to a second logic level on the ID line.

There is provided print apparatus including: piezoelectric member; individual electrode; first and second common electrodes; voltage application circuit; detection circuit configured to detect a capacitance of a first capacitor configured by the piezoelectric member, the individual electrode, and the first common electrode and a second capacitor configured by the piezoelectric member, the individual electrode, and the second common electrode; first switching element; and control circuit. The control circuit is configured to execute: a first voltage application process to apply a first voltage to the second common electrode in order to discharge the ink; a detection process to detect the capacitance after electrically connecting the piezoelectric member and the detection circuit with the first switching element; and a second voltage application process to apply a second voltage to the second common electrode before the detection process, the second voltage being lower than the first voltage.

A drop ejector array device includes a first plurality and a second plurality of drop ejectors that are alternatingly disposed along an array direction on the substrate surface. A voltage input terminal and a current return terminal are disposed on the substrate surface. A first power bus line connects the first plurality to the voltage input terminal. A second power bus line connects the second plurality to the voltage input terminal. The second power bus line is electrically connected to the first power bus line by a primary power bus connector line. A first current return bus line connects the first plurality to the current return terminal. A second current return bus line connects the second plurality to the current return terminal. The second current return bus line is electrically connected to the first current return bus line by a primary current return bus connector line.

A first switching circuit, a second switching circuit, a first bootstrap circuit that is coupled to the first switching circuit and the second switching circuit, and a smoothing circuit and outputs a drive signal are provided, in which the second switching circuit includes a second gate driver that outputs a third gate signal and a fourth gate signal, a third transistor of which the first voltage is supplied, and which is driven based on the third gate signal, a fourth transistor which is driven based on the fourth gate signal, and a second bootstrap circuit that includes a second capacitive element supplying a third voltage to the second gate driver and coupled to a second output point and the second gate driver, and a second diode of which the first voltage is supplied and which is coupled to the second capacitive element.

A liquid discharging apparatus has an integrated circuit that controls supply of a driving signal to a first driving element and to a second driving element according to a discharge control signal. The integrated circuit has: a first switch circuit that receives the driving signal and switches between output and non-output of the driving signal to the first driving element; a second switch circuit that receives the driving signal and switches between output and non-output of the driving signal to the second driving element; and a switch control circuit that receives the discharge control signal and controls whether to cause each of the first switch circuit and the second switch circuit to output the driving signal. The switch control circuit controls the first switch circuit and the second switch circuit according to the first data.

There is provided a liquid discharge apparatus includes an integrated circuit that has a first output terminal outputting a first control signal and a second output terminal outputting a second control signal, a first transistor in which a second terminal and a third terminal are electrically coupled to each other is made according to the first control signal input to a first terminal, and a second transistor in which a fifth terminal and a sixth terminal are electrically coupled to each other is made according to the second control signal input to a fourth terminal, a shortest distance between the first output terminal and the first terminal is shorter than that between the first output terminal and the second terminal, and a shortest distance between the second output terminal and the fourth terminal is shorter than that between the second output terminal and the fifth terminal.

Examples include a fluidic die. The fluidic die comprises an array of field effect transistors including field effect transistors of a first size and field effect transistors of a second size. At least one connecting member interconnects at least some of the field effect transistors of the array of field effect transistors. The fluidic die further comprises a first fluid actuator connected to a first set of field effect transistors having at least one field effect transistor of the first size. The die includes a second fluid actuator connected to a second respective set of field effect transistors having a first respective field effect transistor of the second size interconnected to at least one other field effect transistor of the array.

In some examples, a circuit includes a data line, an input line, a first memory element, and a decoder to receive an address and to enable the first memory element for access in response to the address. The selector is responsive to the data line to select the first memory element, where the selector is to select the first memory element responsive to the data line having a first value, and where the data line is to communicate data of a second memory element in response to the second memory element being enabled for access. The input line is to communicate data of the first memory element in response to the first memory element being selected by the selector.

A print head control circuit includes a first diagnosis signal propagation wiring for propagating a first diagnosis signal, a fifth diagnosis signal propagation wiring for propagating a fifth diagnosis signal indicating a diagnosis result, and a second voltage signal propagation wiring for propagating a second voltage signal. The fifth diagnosis signal propagation wiring and the second voltage signal propagation wiring are electrically coupled to each other via a fifth terminal and a seventh terminal, and the first diagnosis signal propagation wiring and the second diagnosis signal propagation wiring are located to be aligned. The first diagnosis signal propagation wiring and the second voltage signal propagation wiring are located to be adjacent to each other in a direction in which the first diagnosis signal propagation wiring and the second diagnosis signal propagation wiring are aligned.

A liquid discharging apparatus includes: a discharging head that discharges liquid onto a medium; first and second components that are operable for discharging the liquid onto the medium; first and second control circuits that control driving of the discharging head; a first control circuit board on which the first control circuit is provided; a second control circuit board on which the second control circuit is provided; wherein the first component is electrically coupled to the first control circuit, the second component is electrically coupled to the second control circuit, a minimum distance between the first control circuit board and the first component is shorter than a minimum distance between the first control circuit board and the second component, and a minimum distance between the second control circuit board and the second component is shorter than a minimum distance between the second control circuit board and the first component.