An embodiment of the present disclosure is a driving circuit for ejecting liquid from a plurality of nozzles in an ejecting section in a liquid ejecting head. The driving circuit includes a first signal generation section that generates a printing driving signal for ejecting the liquid from the nozzles, a second signal generation section that generates an inspection driving signal for inspecting a state of the ejecting section, and a control section that controls the first signal generation section and the second signal generation section so as to exclusively output one of the printing driving signal and the inspection driving signal to the ejecting section.

An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of contact pads, a plurality of pulldown devices, and control logic. The plurality of contact pads include a first contact pad and a second contact pad. Each of the pulldown devices is electrically coupled to a corresponding contact pad. The control logic enables at least a portion of the pulldown devices in response to both a logic low signal on the first contact pad and a logic low signal on the second contact pad.

A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. The memory circuit includes a controllable selector connected in line with one of the signal paths via the I/O pads, the selector controllable to disconnect the corresponding signal path to the print component, and a memory component to store memory values associated with the print component. A control circuit, in response to a sequence of operating signals received by the I/O pads representing a memory read, to operate the controllable selector to disconnect the signal path to the print component to block the memory read of the print component, and provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.

A liquid discharging apparatus includes: a liquid discharging head having nozzles; a purge mechanism which performs purge of discharging liquid from the nozzles; a signal outputting circuit which outputs signals depending on whether each of the nozzles is a failure nozzle which does not satisfy a predetermined discharging performance; a memory which stores, with respect to each of the nozzles, a value of an failure parameter regarding a number of times each of the nozzles is continuously determined to be the failure nozzle; and a controller. The controller performs failure nozzle determination with respect to at least a part of the nozzles as to whether each of at least the part of the nozzles is the failure nozzle, based on a signal from the signal outputting circuit, and updates the value of the failure parameter in the memory, based on a result of the failure nozzle determination.

A storage apparatus, comprising a memory unit including an anti-fuse element and a resistance element connected in parallel to the anti-fuse element, and an information writer that writes information into the anti-fuse element by cyclically applying a signal to the memory unit, wherein the information writer changes a cycle of a signal to be applied to the memory unit on a basis of a current value supplied to the memory unit.

A memory circuit for a print component including plurality of I/O pads, including a first analog pad and a second analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component, including an analog signal path connected to the first analog pad and the second analog pad, the first analog pad electrically isolated from the second analog pad to interrupt the analog signal path to the print component. The memory circuit further includes a memory component to store memory values associated with the print component, and a control circuit to, in response to a sequence of operating signals received by the I/O pads representing a memory read, provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.

There is provided a head chip including: a first-nozzle; a second-nozzle; a first-pressure-chamber communicating with the first-nozzle; a second-pressure-chamber communicating with the first-nozzle; a third-pressure-chamber communicating with the second-nozzle; a fourth-pressure-chamber communicating with the second-nozzle; a first-piezoelectric-body generating a pressure in the first-pressure-chamber; a second-piezoelectric-body generating a pressure in the second-pressure-chamber; a third-piezoelectric-body generating a pressure in the third-pressure-chamber; a fourth-piezoelectric-body generating a pressure in the fourth-pressure-chamber; a first0individual-electrode coupled to the first-piezoelectric-body; a second-individual-electrode coupled to the second-piezoelectric-body; a third-individual electrode coupled to the third-piezoelectric-body; a fourth-individual-electrode coupled to the fourth-piezoelectric-body; a first-common-electrode commonly coupled to the first-piezoelectric-body and the third-piezoelectric-body; and a second-common-electrode that is independent of the first-common-electrode and is commonly coupled to the second-piezoelectric-body and the fourth-piezoelectric-body.

A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. The memory circuit includes a controllable selector connected in line with one of the signal paths via the I/O pads, the selector controllable to disconnect the corresponding signal path to the print component, and a memory component to store memory values associated with the print component. A control circuit, in response to a sequence of operating signals received by the I/O pads representing a memory read, to operate the controllable selector to disconnect the signal path to the print component to block the memory read of the print component, and provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.

A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. A memory component stores memory values associated with the print component, and a control circuit, in response to a sequence of operating signals on the I/O pads representing a memory read, provides an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.

An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of contact pads, a plurality of pulldown devices, and control logic. The plurality of contact pads include a first contact pad and a second contact pad. Each of the pulldown devices is electrically coupled to a corresponding contact pad. The control logic enables at least a portion of the pulldown devices in response to both a logic low signal on the first contact pad and a logic low signal on the second contact pad.