The modified graphene includes a structure represented by the following formula (I), wherein the modified graphene has a ratio (g/d) of an intensity “g” of a G band to an intensity “d” of a D band of 1.0 or more in a Raman spectroscopy spectrum thereof:
Gr1-Ar1-X1-(Y1).sub.n1  (I)
in the formula (I), Gr1 represents a single-layer graphene or a multilayer graphene, Ar1 represents an arylene group having 6 to 18 carbon atoms, X1 represents a single bond, a linear, branched, or cyclic alkylene group having 1 to 20 carbon atoms, or a group obtained by substituting at least one carbon atom in a linear, branched, or cyclic alkylene group having 1 to 20 carbon atoms with at least one structure selected from the group consisting of —O—, —NH—, ##STR00001##
—CO—, —COO—, —CONH—, and an arylene group.

Systems and methods utilizing water soluble (aqueous) PAA-based polymer binders for silicon-dominant anodes may include an electrode coating layer on a current collector, where the electrode coating layer is formed from silicon and a pyrolyzed water soluble PAA-based polymer blend, wherein the water soluble PAA-based polymer blend comprises PAA and one or more additional water-soluble polymer components. The electrode coating layer may include more than 70% silicon and the anode may be in a lithium ion battery.

A packaging semiconductor device, such as a fan-out Wafer-Level Packaging (FOWLP) device, is fabricated by providing a semiconductor device (20) having conductive patterns (22) disposed on a first surface and then forming, on the conductive patterns, photoresist islands (24) having a first predetermined shape defined by a first critical width dimension and a minimum height dimension so that a subsequently-formed dielectric polymer layer (26) surrounds but does not cover each photoresist island (24), thereby allowing each photoresist island to be selectively removed from the one or more conductive patterns to form one or more via openings (28) in the dielectric polymer layer such that each via opening has a second predetermined shape which matches at least part of the first predetermined shape of the photoresist islands.

A packaging semiconductor device, such as a fan-out Wafer-Level Packaging (FOWLP) device, is fabricated by providing a semiconductor device (20) having conductive patterns (22) disposed on a first surface and then forming, on the conductive patterns, photoresist islands (24) having a first predetermined shape defined by a first critical width dimension and a minimum height dimension so that a subsequently-formed dielectric polymer layer (26) surrounds but does not cover each photoresist island (24), thereby allowing each photoresist island to be selectively removed from the one or more conductive patterns to form one or more via openings (28) in the dielectric polymer layer such that each via opening has a second predetermined shape which matches at least part of the first predetermined shape of the photoresist islands.

The solid content contains a resin component (A) and a filler (B). The resin component (A) includes at least one of a fluorine-containing copolymer (a1) or a silicon-containing copolymer (a2). The fluorine-containing copolymer (a1) includes a fluorine-containing segment and an acrylic segment containing no fluorine or silicon. The silicon-containing copolymer (a2) includes a silicon-containing segment and an acrylic segment containing no fluorine or silicon. The filler (B) has a mean particle size falling within a range from 10 nm to 200 nm.

The solid content contains a resin component (A) and a filler (B). The resin component (A) includes at least one of a fluorine-containing copolymer (a1) or a silicon-containing copolymer (a2). The fluorine-containing copolymer (a1) includes a fluorine-containing segment and an acrylic segment containing no fluorine or silicon. The silicon-containing copolymer (a2) includes a silicon-containing segment and an acrylic segment containing no fluorine or silicon. The filler (B) has a mean particle size falling within a range from 10 nm to 200 nm.

Various embodiments disclosed relate to a substrate. The present disclosure provides a substrate for use in both surface enhanced Raman spectroscopy and surface enhanced infrared spectroscopy. The substrate includes a flexible polymeric membrane, a plurality of metal oxide nanoparticles disposed on the polymeric membrane, and a plurality of metallic nanoparticles directly disposed on a portion of the plurality of metal oxide nanoparticles. The plurality of metal oxide nanoparticles are configured to work synergistically with metal nanoparticles upon exposure of the substrate surface to at least one of visible light or infrared radiation.

Various embodiments disclosed relate to a substrate. The present disclosure provides a substrate for use in both surface enhanced Raman spectroscopy and surface enhanced infrared spectroscopy. The substrate includes a flexible polymeric membrane, a plurality of metal oxide nanoparticles disposed on the polymeric membrane, and a plurality of metallic nanoparticles directly disposed on a portion of the plurality of metal oxide nanoparticles. The plurality of metal oxide nanoparticles are configured to work synergistically with metal nanoparticles upon exposure of the substrate surface to at least one of visible light or infrared radiation.

A composition includes at least one type of conductive or semiconductive nanostructures, wherein at least one conductive ligand is arranged on the surface of the nanostructures, and at least one solvent, wherein the ligand has at least one group by which functionalization is possible. This makes it possible in simple fashion to obtain functionalizable conductive structures, in particular by inkjet processes.

A composition includes at least one type of conductive or semiconductive nanostructures, wherein at least one conductive ligand is arranged on the surface of the nanostructures, and at least one solvent, wherein the ligand has at least one group by which functionalization is possible. This makes it possible in simple fashion to obtain functionalizable conductive structures, in particular by inkjet processes.