The present application discloses a manufacturing method for a gate electrode and a thin film transistor, and a display panel, including: depositing an aluminum film on a substratum by physical vapor deposition; depositing a molybdenum film over the aluminum film by atomic layer deposition; and etching the aluminum film and the molybdenum film to form the gate electrode of a predetermined pattern.

Disclosed is method for plating a PVD (physical vapor deposition) germ killing film, employing a vacuum magnetron sputtering technology and using a nano-silver-containing target for uniformly distributing nano-silver to form a germ killing film. The method can achieve the aim of full germ killing. Besides, nano-silver is enveloped in the sputtering target to form the film, so the target material target can play the role of protecting the nano-silver. Target material can be Al, Cr, stainless steel and Cu. Therefore, the nano-silver is protected; wear resistance of the germ killing film is increased; and the germ killing film can continuously kills germs for a long time.

Disclosed is method for plating a PVD (physical vapor deposition) germ killing film, employing a vacuum magnetron sputtering technology and using a nano-silver-containing target for uniformly distributing nano-silver to form a germ killing film. The method can achieve the aim of full germ killing. Besides, nano-silver is enveloped in the sputtering target to form the film, so the target material target can play the role of protecting the nano-silver. Target material can be Al, Cr, stainless steel and Cu. Therefore, the nano-silver is protected; wear resistance of the germ killing film is increased; and the germ killing film can continuously kills germs for a long time.

There are provided a press-fit terminal which has an excellent whisker resistance and a low inserting force, is unlikely to cause shaving of plating when the press-fit terminal is inserted into a substrate, and has a high heat resistance, and an electronic component using the same. A press-fit terminal comprises: a female terminal connection part provided at one side of an attached part to be attached to a housing; and a substrate connection part provided at the other side and attached to a substrate by press-fitting the substrate connection part into a through-hole formed in the substrate. At least the substrate connection part has the surface structure described below, and the press-fit terminal has an excellent whisker resistance. The surface structure comprises: an A layer formed as an outermost surface layer and formed of Sn, In, or an alloy thereof; a B layer formed below the A layer and constituted of one or two or more selected from the group consisting of Ag, Au, Pt, Pd, Ru, Rh, Os, and Ir; and a C layer formed below the B layer and constituted of one or two or more selected from the group consisting of Ni, Cr, Mn, Fe, Co, and Cu. The A layer has a thickness of 0.002 to 0.2 μm. The B layer has a thickness of 0.001 to 0.3 μm. The C layer has a thickness of 0.05 μm or larger.

A coated steel sheet including a steel sheet and a coating layer provided on at least part of the surface of the steel sheet, in which the coating layer has a predetermined chemical composition in terms of % by mass, and the coating layer has a granular Mg.sub.2Sn phase-containing structure in an area fraction of from 5 to 65%, and a structure containing a solid solution of Zn and Al, and the granular Mg.sub.2Sn phase-containing structure is a structure constituted with a Zn phase and a granular Mg.sub.2Sn phase having a crystal grain size of less than 1 μm dispersed in the Zn phase.

An article may include a substrate, a diffusion barrier layer formed on the substrate, and a protective layer formed on the diffusion barrier coating. The diffusion barrier layer may include iridium.

Methods for producing a high temperature oxidation and hot corrosion resistant MCrAlX coating on a superalloy substrate include applying an M-metal, chromium, and aluminum or an aluminum alloy comprising a reactive element to at least one surface of the superalloy component by electroplating at electroplating conditions below 100° C. in a plating bath thereby forming a plated component and heat treating the plated component.

The present invention relates to a method for manufacturing an internal antenna (intenna) and, in particular, to a method for manufacturing an intenna, which allows a resin molded product to be smoothly and securely plated with a metal by applying a primer paint on the surface of the resin molded product, and thereby improves the reliability of the metal plating formed on the resin molded product.

Zn alloy plated steel material having excellent weldability and processed-part corrosion resistance and a method for production of Zn alloy plated steel material are provided. In the Zn alloy plated steel material comprising base steel material and a Zn alloy plating layer, the Zn alloy plating layer includes, by wt %, Al: 0.1-5.0%, Mg: 0.1-5.0%, as well as a remainder of Zn and inevitable impurities. The Zn alloy plated steel material includes a lower interface layer and an upper interface layer between the base steel material and the Zn alloy plating layer, wherein the lower interface layer is formed on the base steel material and has a dense structure, and the upper interface layer is formed on the lower interface layer and has a network-type or island-type structure.

Zn alloy plated steel material having excellent weldability and processed-part corrosion resistance and a method for production of Zn alloy plated steel material are provided. In the Zn alloy plated steel material comprising base steel material and a Zn alloy plating layer, the Zn alloy plating layer includes, by wt %, Al: 0.1-5.0%, Mg: 0.1-5.0%, as well as a remainder of Zn and inevitable impurities. The Zn alloy plated steel material includes a lower interface layer and an upper interface layer between the base steel material and the Zn alloy plating layer, wherein the lower interface layer is formed on the base steel material and has a dense structure, and the upper interface layer is formed on the lower interface layer and has a network-type or island-type structure.