A circuit layer is formed by drilling vias and forming channels in a circuit layer which has catalytic particles exposed on the surfaces, channels, and vias. A first flash electroless deposition is followed by application of dry film, followed by selective laser ablation of the dry film channels and vias. A second electroless solution is applied which provides additional deposition over the first flash electroless deposition but only on the vias and trace channel areas. An electrodeposition follows, using the first deposition as a cathode. The dry film is stripped and the first electroless layer is etched, leaving only depositions in the channels and vias.

A circuit layer is formed by drilling vias and forming channels in a circuit layer which has catalytic particles exposed on the surfaces, channels, and vias. A first flash electroless deposition is followed by application of dry film, followed by selective laser ablation of the dry film channels and vias. A second electroless solution is applied which provides additional deposition over the first flash electroless deposition but only on the vias and trace channel areas. An electrodeposition follows, using the first deposition as a cathode. The dry film is stripped and the first electroless layer is etched, leaving only depositions in the channels and vias.

A system for printing metal interconnects on a substrate includes an anode substrate. A plurality of anodes are arranged on one side of the anode substrate with a first predetermined gap between adjacent ones of the plurality of anodes. A first plurality of fluid holes have one end located between the plurality of anodes. A plurality of control devices is configured to selectively supply current to the plurality of anodes, respectively. The anode substrate is arranged within a second predetermined gap of a work piece substrate including a metal seed layer. A ratio of the second predetermined gap to the first predetermined gap is in a range from 0.5:1 and 1.5:1. An array controller is configured to energize selected ones of the plurality of anodes using corresponding ones of the plurality of control devices while electrolyte solution is supplied through the first plurality of fluid holes between the anode substrate and the work piece substrate.

A system for printing metal interconnects on a substrate includes an anode substrate. A plurality of anodes are arranged on one side of the anode substrate with a first predetermined gap between adjacent ones of the plurality of anodes. A first plurality of fluid holes have one end located between the plurality of anodes. A plurality of control devices is configured to selectively supply current to the plurality of anodes, respectively. The anode substrate is arranged within a second predetermined gap of a work piece substrate including a metal seed layer. A ratio of the second predetermined gap to the first predetermined gap is in a range from 0.5:1 and 1.5:1. An array controller is configured to energize selected ones of the plurality of anodes using corresponding ones of the plurality of control devices while electrolyte solution is supplied through the first plurality of fluid holes between the anode substrate and the work piece substrate.

A method for manufacturing a printed wiring board includes forming through holes in a double-sided copper-clad laminated plate such that a high-density region of the through holes and a low-density region of the through holes are formed, forming an electrolytic plating film on a copper foil of the plate in the high-density and low-density regions, forming a masking resist to mask the plating film in the high-density region, etching the plating film in the low-density region exposed from the resist such that the plating film in the low-density region is thinned, peeling off the resist from the plating film in the high-density region, and forming a conductor circuit including the copper foil and the plating film in the high-density and low-density regions. The forming of the plating film on the copper foil of the plate includes forming the plating film in the through holes in the high-density and low-density regions.

A method of manufacturing a printed circuit board a includes preparing an insulating substrate on which a first metal layer is formed, stacking a resist laminate having a plurality of layers on the first metal layer, forming an opening exposing a portion of the first metal layer by patterning the stacked resist laminate having the plurality of layers, forming a second metal layer on the exposed portion of the first metal layer, removing the patterned resist laminate having the plurality of layers, and etching at least another portion of the first metal layer.

A method of making an electrical component includes transmitting electrical energy from a power source through one or more deposition anodes, through an electrolyte solution, and to an intralayer electrical-connection feature of a build plate, such that material is electrochemically deposited onto the intralayer electrical-connection feature and forms an interlayer electrical-connection feature. The method also includes securing a dielectric material so that the dielectric material contacts and electrically insulates the intralayer electrical-connection feature and contacts and at least partially electrically insulates the interlayer electrical-connection feature. The method additionally includes depositing a seed layer onto the dielectric material and the interlayer electrical-connection feature, electrochemically depositing material onto the seed layer, to form at least one second intralayer electrical-connection feature of the electrical component, and removing any one or more portions of the seed layer onto which no portion of the at least one second intralayer electrical-connection feature is formed.

A method of making an electrical component includes transmitting electrical energy from a power source through one or more deposition anodes, through an electrolyte solution, and to an intralayer electrical-connection feature of a build plate, such that material is electrochemically deposited onto the intralayer electrical-connection feature and forms an interlayer electrical-connection feature. The method also includes securing a dielectric material so that the dielectric material contacts and electrically insulates the intralayer electrical-connection feature and contacts and at least partially electrically insulates the interlayer electrical-connection feature. The method additionally includes depositing a seed layer onto the dielectric material and the interlayer electrical-connection feature, electrochemically depositing material onto the seed layer, to form at least one second intralayer electrical-connection feature of the electrical component, and removing any one or more portions of the seed layer onto which no portion of the at least one second intralayer electrical-connection feature is formed.

Exemplary electroplating systems may include a vessel. The systems may include a paddle disposed within the vessel. The paddle may be characterized by a first surface and a second surface. The first surface of the paddle may be include a plurality of ribs that extend upward from the first surface. The plurality of ribs may be arranged in a generally parallel manner about the first surface. The paddle may define a plurality of apertures through a thickness of the paddle. Each of the plurality of apertures may have a diameter of less than about 5 mm. The paddle may have an open area of less than about 15%.

Exemplary electroplating systems may include a vessel. The systems may include a paddle disposed within the vessel. The paddle may be characterized by a first surface and a second surface. The first surface of the paddle may be include a plurality of ribs that extend upward from the first surface. The plurality of ribs may be arranged in a generally parallel manner about the first surface. The paddle may define a plurality of apertures through a thickness of the paddle. Each of the plurality of apertures may have a diameter of less than about 5 mm. The paddle may have an open area of less than about 15%.