The present invention relates to an electrode comprising an electrically conductive substrate of which at least one portion of the surface is covered with a metal deposit of copper, the surface of said deposit being in an oxidised, sulphurised, selenised and/or tellurised form and the deposit having a specific surface area of more than 1 m.sup.2/g; a method for preparing such an electrode; and a method for oxygenising water with dioxygen involving such an electrode.

A method for manufacturing a printed wiring board includes forming an electroless plating layer on a solder resist layer such that the electroless plating layer has a film thickness in the range of 0.05 μm to 0.70 μm, forming plating resist such that the plating resist has openings exposing portions of the electroless plating layer, applying electrolytic plating such that metal posts are formed in the openings of the plating resist, removing the plating resist, and etching the electroless plating layer exposed from the metal posts. The solder resist layer is formed such that the solder resist layer has openings exposing portions of the outermost conductor layer, the electroless plating layer is formed on the portions of the outermost conductor layer, and the plating resist is formed such that the openings of the plating resist expose the portions of the electroless plating layer formed in the openings of the solder resist layer.

A method for manufacturing a printed wiring board includes forming an electroless plating layer on a solder resist layer such that the electroless plating layer has a film thickness in the range of 0.05 μm to 0.70 μm, forming plating resist such that the plating resist has openings exposing portions of the electroless plating layer, applying electrolytic plating such that metal posts are formed in the openings of the plating resist, removing the plating resist, and etching the electroless plating layer exposed from the metal posts. The solder resist layer is formed such that the solder resist layer has openings exposing portions of the outermost conductor layer, the electroless plating layer is formed on the portions of the outermost conductor layer, and the plating resist is formed such that the openings of the plating resist expose the portions of the electroless plating layer formed in the openings of the solder resist layer.

The present application provides a method for improving a pit defect formed after a copper electroplating process, comprising: forming a dielectric layer on a wafer; etching the dielectric layer to form a trench; forming a seed barrier layer on the surface of the trench; pre-cleaning the wafer to increase the wetness of the trench on the wafer; filling the trench with copper by means of electroplating; polishing the upper surface of the trench to planarize the upper surface of the trench. The wetness of the wafer surface can be increased by pre-cleaning a via. An excessively dry wafer surface leads to a poor wetness effect when the wafer enters water, a bubble is difficult to be discharged, a void is easy to be generated in electroplating. By the pre-cleaning step, the problem of a poor wetness effect occurring when the wafer enters water can be effectively improved.

Exemplary methods of electroplating a metal with a nanotwin crystal structure are described. The methods may include plating a metal material into at least one opening on a patterned substrate, where at least a portion of the metal material is characterized by a nanotwin crystal structure. The methods may further include polishing an exposed surface of the metal material in the opening to reduce an average surface roughness of the exposed surface to less than or about 1 nm. The polished exposed surface may include at least a portion of the metal material characterized by the nanotwin crystal structure. In additional examples, the nanotwin-phased metal may be nanotwin-phased copper.

Exemplary methods of electroplating a metal with a nanotwin crystal structure are described. The methods may include plating a metal material into at least one opening on a patterned substrate, where at least a portion of the metal material is characterized by a nanotwin crystal structure. The methods may further include polishing an exposed surface of the metal material in the opening to reduce an average surface roughness of the exposed surface to less than or about 1 nm. The polished exposed surface may include at least a portion of the metal material characterized by the nanotwin crystal structure. In additional examples, the nanotwin-phased metal may be nanotwin-phased copper.

A manufacturing method of copper foil and circuit board assembly for high frequency transmission are provided. Firstly, a raw copper foil having a predetermined surface is produced by an electrolyzing process. Subsequently, a roughened layer including a plurality of copper particles is formed on the predetermined surface by an arsenic-free electrolytic roughening treatment and an arsenic-free electrolytic surface protection treatment. Thereafter, a surface treatment layer is formed on the roughened layer, and the roughened layer is made of a material which includes at least one kind of non-copper metal elements and the concentration of the non-copper metal elements is smaller than 400 ppm. By controlling the concentration of the non-copper elements, the resistance of the copper foil can be reduced.

A manufacturing method of copper foil and circuit board assembly for high frequency transmission are provided. Firstly, a raw copper foil having a predetermined surface is produced by an electrolyzing process. Subsequently, a roughened layer including a plurality of copper particles is formed on the predetermined surface by an arsenic-free electrolytic roughening treatment and an arsenic-free electrolytic surface protection treatment. Thereafter, a surface treatment layer is formed on the roughened layer, and the roughened layer is made of a material which includes at least one kind of non-copper metal elements and the concentration of the non-copper metal elements is smaller than 400 ppm. By controlling the concentration of the non-copper elements, the resistance of the copper foil can be reduced.

A metal porous body having a three-dimensional network structure, includes: a framework forming the three-dimensional network structure; and a coating layer having fine pores and coating the framework, the three-dimensional network structure including a rib and a node connecting a plurality of ribs, the framework including an alkali-resistant first metal, the fine pores having an average fine pore diameter of 10 nm or more and 1 μm or less, the coating layer including an alkali-resistant second metal and optionally including an alkali-soluble metal, the alkali-soluble metal being contained at a proportion of 0% by mass or more and 30% by mass or less with reference to a total mass of the framework and the coating layer.

Embodiments relate to nanoporous copper interconnects on a first body for electrically connecting to a second body. To fabricate the nanoporous copper interconnect, a zinc-copper alloy is deposited on recesses on the surface of the first body, and then the zinc is removed from the zinc-copper alloy to obtain nanoporous copper. The first body and the second body can be attached using bonding between oxide surfaces of the two bodies or be provided with underfill between the two bodies. The nanoporous copper electrically connects to an active layer or electrical components of the first body and the second bodies. Using nanoporous copper as interconnects is advantageous, among other reasons, because it can be formed at a low temperature, it is compatible with a standard complementary metal-oxide-semiconductor (CMOS) process, it provides good electrical conductivity, and it is less likely to cause issues due to migration of material.