A method for deposition of a thin film onto a substrate is provided. The method includes providing a source precursor containing on or more of elements constituting the thin film, generating a transient species from the source precursor, and depositing a thin film onto the substrate from the transient species. The transient species being a reactive intermediate that has a limited lifetime in a condensed phase at or above room temperature.

A method of in-situ transfer during fabrication of a component comprising a 2-dimensional crystalline thin film on a substrate is disclosed. In one embodiment, the method includes forming a layered structure comprising a polymer, a 2-dimensional crystalline thin film, a metal catalyst, and a substrate. The metal catalyst, being a growth medium for the two-dimensional crystalline thin film, is etched and removed by infiltrating liquid to enable the in-situ transfer of the two-dimensional crystalline thin film directly onto the underlying substrate.

An ultra-hard carbon film is formed by the uniaxial compression of thin films of graphene. The graphene films are two or three layers thick (2-L or 3-L). High pressure compression forms a diamond-like film and provides improved properties to the coated substrates.

An object of the present invention is to provide a SiC semiconductor substrate having a growth layer with a controlled step height, a manufacturing method thereof, and a manufacturing device thereof. The method includes: a growth process that grows a SiC substrate 10 in a SiC—Si equilibrium vapor pressure environment. In this way, when the SiC substrate 10 is grown in the SiC—Si equilibrium vapor pressure environment, it is possible to provide a SiC semiconductor substrate in which the step height of the growth layer is controlled.

An object of the present invention is to provide a SiC semiconductor substrate capable of reducing a density of basal plane dislocations (BPD) in a growth layer, a manufacturing method thereof, and a manufacturing device thereof. The method includes: a strained layer removal process S10 that removes a strained layer introduced on a surface of a SiC substrate; and an epitaxial growth process S20 that conducts growth under a condition that a terrace width W of the SiC substrate is increased. When a SiC semiconductor substrate is manufactured in such processes, the basal plane dislocations BPD in the growth layer can be reduced, and a yield of a SiC semiconductor device can be improved.

The present disclosure provides high-purity semi-insulating single-crystal silicon carbide wafer and crystal which include one polytype single crystal. The semi-insulating single-crystal silicon carbide wafer has silicon vacancy inside, wherein the silicon-vacancy concentration is greater than 5E11 cm{circumflex over ( )}-3.

The present disclosure provides high-purity semi-insulating single-crystal silicon carbide wafer and crystal which include one polytype single crystal. The semi-insulating single-crystal silicon carbide wafer has silicon vacancy inside, wherein the silicon-vacancy concentration is greater than 5E11 cm{circumflex over ( )}-3.

The present disclosure provides a manufacturing method of semi-insulating single-crystal silicon carbide powder comprising: providing a semi-insulating single-crystal silicon carbide bulk, wherein the semi-insulating single-crystal silicon carbide bulk has a first silicon-vacancy concentration, and the first silicon-vacancy concentration is greater than 5E11 cm{circumflex over ( )}−3; refining the semi-insulating single-crystal silicon carbide bulk to obtain a semi-insulating single-crystal silicon carbide coarse particle, wherein the semi-insulating single-crystal silicon carbide coarse particle has a second silicon-vacancy concentration and a first particle diameter, the second silicon-vacancy concentration is greater than 5E11 cm{circumflex over ( )}−3, and the first particle diameter is between 50 μm and 350 μm; self-impacting the semi-insulating single-crystal silicon carbide coarse particle to obtain a semi-insulating single-crystal silicon carbide powder, wherein the semi-insulating single-crystal silicon carbide powder has a third silicon-vacancy concentration and a second particle diameter, the third silicon-vacancy concentration is greater than 5E11 cm{circumflex over ( )}−3, and the second particle diameter is between 1 μm and 50 μm.

A wafer having relaxation moduli different by 450 GPa or less, as determined by dynamic mechanical analysis, when loaded to 1 N and 18 N with a loading rate of 0.1 N/min at a temperature of 25° C.

A wafer having relaxation moduli different by 450 GPa or less, as determined by dynamic mechanical analysis, when loaded to 1 N and 18 N with a loading rate of 0.1 N/min at a temperature of 25° C.