Provided is a semiconductor device, including at least: a semiconductor layer; and a gate electrode that is arranged directly or via another layer on the semiconductor layer, the semiconductor device being configured in such a manner as to cause a current to flow in the semiconductor layer at least in a first direction that is along with an interface between the semiconductor layer and the gate electrode, the semiconductor layer having a corundum structure, a direction of an m-axis in the semiconductor layer being the first direction.

Provided is a semiconductor device, including at least: a semiconductor layer; and a gate electrode that is arranged directly or via another layer on the semiconductor layer, the semiconductor device being configured in such a manner as to cause a current to flow in the semiconductor layer at least in a first direction that is along with an interface between the semiconductor layer and the gate electrode, the semiconductor layer having a corundum structure, a direction of an m-axis in the semiconductor layer being the first direction.

A manufacturing method of a nitride semiconductor device includes: introducing a p type impurity into at least a part of an upper layer portion of a first nitride semiconductor layer to form a p type impurity introduction region; forming a second nitride semiconductor layer from an upper surface of the first nitride semiconductor layer so as to include the p type impurity introduction region; and performing an anneal treatment in a state where the second nitride semiconductor layer is formed on the first nitride semiconductor layer.

A manufacturing method of a nitride semiconductor device includes: introducing a p type impurity into at least a part of an upper layer portion of a first nitride semiconductor layer to form a p type impurity introduction region; forming a second nitride semiconductor layer from an upper surface of the first nitride semiconductor layer so as to include the p type impurity introduction region; and performing an anneal treatment in a state where the second nitride semiconductor layer is formed on the first nitride semiconductor layer.

A capacitor is provided for high temperature systems. The capacitor includes: a substrate formed from silicon carbide material; a dielectric stack layer, including a first layer deposited on the substrate and a second layer deposited on the first layer; a Schottky contact layer deposited on the second layer; and an Ohmic contact layer deposited on the substrate. The first layer is formed with aluminum nitride (AlN) epitaxially, and the second layer is formed with aluminum oxide (Al.sub.2O.sub.3). AlN and Al.sub.2O.sub.3 are ultrawide band gap materials, and as a result, they can be use as the dielectric in the capacitor, allowing the capacitance changes to be less than 10% between −250° C. and 600° C., which is very effective for the high temperature systems.

A method of manufacturing a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a SiC single crystal substrate, the method including identifying a total number of large-pit defects caused by micropipes in the SiC single crystal substrate and large-pit defects caused by substrate carbon inclusions, both of which are contained in the SiC epitaxial layer, using microscopic and photoluminescence images. Also disclosed is a method of manufacturing a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a single crystal substrate, the method including identifying locations of the large-pit defects caused by micropipes in the SiC single crystal substrate and the large-pit defects caused by substrate carbon inclusions in the SiC epitaxial layer, using microscopic and photoluminescence images.

A method of manufacturing a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a SiC single crystal substrate, the method including identifying a total number of large-pit defects caused by micropipes in the SiC single crystal substrate and large-pit defects caused by substrate carbon inclusions, both of which are contained in the SiC epitaxial layer, using microscopic and photoluminescence images. Also disclosed is a method of manufacturing a SiC epitaxial wafer in which a SiC epitaxial layer is formed on a single crystal substrate, the method including identifying locations of the large-pit defects caused by micropipes in the SiC single crystal substrate and the large-pit defects caused by substrate carbon inclusions in the SiC epitaxial layer, using microscopic and photoluminescence images.

A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face.

There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the substrate; (b) applying annealing to the first layer in an inert gas atmosphere; and (c) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum on the first layer by a vapor phase growth after performing (b), and constituting the nitride semiconductor layer by the first layer and the second layer.

There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the substrate; (b) applying annealing to the first layer in an inert gas atmosphere; and (c) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum on the first layer by a vapor phase growth after performing (b), and constituting the nitride semiconductor layer by the first layer and the second layer.