C30B31/06

Synthesis and processing of Q-carbon, graphene, and diamond
10566193 · 2020-02-18 · ·

Using processes disclosed herein, materials and structures are created and used. For example, processes can include melting boron nitride or amorphous carbon into an undercooled state followed by quenching. Exemplary new materials disclosed herein can be ferromagnetic and/or harder than diamond. Materials disclosed herein may include dopants in concentrations exceeding thermodynamic solubility limits. A novel phase of solid carbon has structure different than diamond and graphite.

Synthesis and processing of novel phase of boron nitride (Q-BN)
10529564 · 2020-01-07 · ·

Using processes disclosed herein, materials and structures are created and used. For example, processes can include melting boron nitride or amorphous carbon into an undercooled state followed by quenching. Exemplary new materials disclosed herein can be ferromagnetic and/or harder than diamond. Materials disclosed herein may include dopants in concentrations exceeding thermodynamic solubility limits. A novel phase of solid carbon has structure different than diamond and graphite.

Synthesis and processing of novel phase of boron nitride (Q-BN)
10529564 · 2020-01-07 · ·

Using processes disclosed herein, materials and structures are created and used. For example, processes can include melting boron nitride or amorphous carbon into an undercooled state followed by quenching. Exemplary new materials disclosed herein can be ferromagnetic and/or harder than diamond. Materials disclosed herein may include dopants in concentrations exceeding thermodynamic solubility limits. A novel phase of solid carbon has structure different than diamond and graphite.

Biotemplated perovskite nanomaterials

A biotemplated nanomaterial can include a crystalline perovskite.

Biotemplated perovskite nanomaterials

A biotemplated nanomaterial can include a crystalline perovskite.

METHOD AND STRUCTURE OF SINGLE CRYSTAL ELECTRONIC DEVICES WITH ENHANCED STRAIN INTERFACE REGIONS BY IMPURITY INTRODUCTION
20190259934 · 2019-08-22 ·

A method of manufacture and resulting structure for a single crystal electronic device with an enhanced strain interface region. The method of manufacture can include forming a nucleation layer overlying a substrate and forming a first and second single crystal layer overlying the nucleation layer. This first and second layers can be doped by introducing one or more impurity species to form a strained single crystal layers. The first and second strained layers can be aligned along the same crystallographic direction to form a strained single crystal bi-layer having an enhanced strain interface region. Using this enhanced single crystal bi-layer to form active or passive devices results in improved physical characteristics, such as enhanced photon velocity or improved density charges.

METHOD AND STRUCTURE OF SINGLE CRYSTAL ELECTRONIC DEVICES WITH ENHANCED STRAIN INTERFACE REGIONS BY IMPURITY INTRODUCTION
20190259934 · 2019-08-22 ·

A method of manufacture and resulting structure for a single crystal electronic device with an enhanced strain interface region. The method of manufacture can include forming a nucleation layer overlying a substrate and forming a first and second single crystal layer overlying the nucleation layer. This first and second layers can be doped by introducing one or more impurity species to form a strained single crystal layers. The first and second strained layers can be aligned along the same crystallographic direction to form a strained single crystal bi-layer having an enhanced strain interface region. Using this enhanced single crystal bi-layer to form active or passive devices results in improved physical characteristics, such as enhanced photon velocity or improved density charges.

METHOD OF PRODUCING LARGE GaAs AND GaP INFRARED WINDOWS

A method of growing large GaAs or GaP IR window slabs by HVPE, and in embodiments by LP-HVPE, includes obtaining a plurality of thin, single crystal, epitaxial-quality GaAs or GaP wafers, cleaving the wafers into tiles having ultra-flat, atomically smooth, substantially perpendicular edges, and then butting the tiles together to form an HVPE substrate larger than 4 inches for GaP, and larger than 8 inches or even 12 inches for GaAs. Subsequent HVPE growth causes the individual tiles to fuse by optical bonding into a large tiled single crystal wafer, while any defects nucleated at the tile boundaries are healed, causing the tiles to merge with themselves and with the slab with no physical boundaries, and no degradation in optical quality. A dopant such as Si can be added to the epitaxial gases during the final HVPE growth stage to produce EMI shielded GaAs windows.

METHOD OF PRODUCING LARGE GaAs AND GaP INFRARED WINDOWS

A method of growing large GaAs or GaP IR window slabs by HVPE, and in embodiments by LP-HVPE, includes obtaining a plurality of thin, single crystal, epitaxial-quality GaAs or GaP wafers, cleaving the wafers into tiles having ultra-flat, atomically smooth, substantially perpendicular edges, and then butting the tiles together to form an HVPE substrate larger than 4 inches for GaP, and larger than 8 inches or even 12 inches for GaAs. Subsequent HVPE growth causes the individual tiles to fuse by optical bonding into a large tiled single crystal wafer, while any defects nucleated at the tile boundaries are healed, causing the tiles to merge with themselves and with the slab with no physical boundaries, and no degradation in optical quality. A dopant such as Si can be added to the epitaxial gases during the final HVPE growth stage to produce EMI shielded GaAs windows.

METHOD OF PRODUCING LARGE GaAs AND GaP INFRARED WINDOWS

IR window slabs of GaP greater than 4 inches diameter, and of GaAs greater than 8 inches diameter, are grown on a substrate using Hydride Vapor Phase Epitaxy (HVPE), preferably low pressure HVPE (LP-HVPE). Growth rates can be hundreds of microns per hour, comparable to vertical melt growth. GaAs IR windows produced by the disclosed method exhibit lower absorption than crystals grown from vertical melt near 1 micron, due to reduced impurities and reduced growth temperatures that limit the solubility of excess arsenic, and thereby reduce the EL2 defects that cause high absorption near one micron in conventional GaAs boules. Silicon wafers can be used as HVPE substrates. For GaAs, layers of GaAsP that vary from 0% to 100% As can be applied to the substrate. EMI shielding can be applied by adding a dopant during the final stage of growth to provide a conductive GaAs or GaP layer.